参数资料
型号: AD7713ARZ-REEL
厂商: Analog Devices Inc
文件页数: 9/28页
文件大小: 0K
描述: IC ADC 24BIT SIGMA-DELTA 24SOIC
标准包装: 1,000
位数: 24
采样率(每秒): 205
数据接口: 串行
转换器数目: 1
功率耗散(最大): 5.5mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 带卷 (TR)
输入数目和类型: 1 个单端,单极;1 个差分,单极;1 个差分,双极
REV. D
AD7713
–17–
is invoked by writing the appropriate values (0, 0, 1) to the
MD2, MD1, and MD0 bits of the control register. In this cali-
bration mode, the shorted inputs node is switched in to the
modulator first and a conversion is performed; the VREF node is
then switched in, and another conversion is performed. When
the calibration sequence is complete, the calibration coefficients
updated, and the filter resettled to the analog input voltage, the
DRDY output goes low. The self-calibration procedure takes
into account the selected gain on the PGA.
For bipolar input ranges in the self-calibrating mode, the sequence
is very similar to that just outlined. In this case, the two points
that the AD7713 calibrates are midscale (bipolar zero) and
positive full scale.
System Calibration
System calibration allows the AD7713 to compensate for system
gain and offset errors as well as its own internal errors. System
calibration performs the same slope factor calculations as self-
calibration but uses voltage values presented by the system to
the AIN inputs for the zero-scale and full-scale points. System
calibration is a 2-step process. The zero-scale point must be
presented to the converter first. It must be applied to the converter
before the calibration step is initiated and remain stable until the
step is complete. System calibration is initiated by writing the
appropriate values (0, 1, 0) to the MD2, MD1, and MD0 bits
of the control register. The
DRDY output from the device will
signal when the step is complete by going low. After the zero-
scale point is calibrated, the full-scale point is applied and the
second step of the calibration process is initiated by again writ-
ing the appropriate values (0, 1, 1) to MD2, MD1, and MD0.
Again, the full-scale voltage must be set up before the calibra-
tion is initiated, and it must remain stable throughout the
calibration step.
DRDY goes low at the end of this second step
to indicate that the system calibration is complete. In the unipo-
lar mode, the system calibration is performed between the two
endpoints of the transfer function; in the bipolar mode, it is
performed between midscale and positive full scale.
This 2-step system calibration mode offers another feature.
After the sequence has been completed, additional offset or gain
calibrations can be performed by themselves to adjust the zero
reference point or the system gain. This is achieved by perform-
ing the first step of the system calibration sequence (by writing
0, 1, 0 to MD2, MD1, and MD0). This will adjust the zero-
scale or offset point but will not change the slope factor from
what was set during a full system calibration sequence.
System calibration can also be used to remove any errors from
an antialiasing filter on the analog input. A simple R, C anti-
aliasing filter on the front end may introduce a gain error on the
analog input voltage but the system calibration can be used to
remove this error.
System Offset Calibration
System offset calibration is a variation of both the system cali-
bration and self-calibration. In this case, the zero-scale point
for the system is presented to the AIN input of the converter.
System offset calibration is initiated by writing 1, 0, 0 to MD2,
MD1, and MD0. The system zero-scale coefficient is deter-
mined by converting the voltage applied to the AIN input, while
the full-scale coefficient is determined from the span between
this AIN conversion and a conversion on VREF. The zero-scale
point should be applied to the AIN input for the duration of the
calibration sequence. This is a 1-step calibration sequence with
DRDY going low when the sequence is completed. In the uni-
polar mode, the system offset calibration is performed between
the two endpoints of the transfer function; in the bipolar mode,
it is performed between midscale and positive full scale.
Background Calibration
The AD7713 also offers a background calibration mode where
the part interleaves its calibration procedure with its normal
conversion sequence. In the background calibration mode, the
same voltages are used as the calibration points as are used in
the self-calibration mode, i.e., shorted inputs and VREF. The
background calibration mode is invoked by writing 1, 0, 1 to
MD2, MD1, and MD0 of the control register. When invoked,
the background calibration mode reduces the output data rate of
the AD7713 by a factor of 6 while the –3 dB bandwidth remains
unchanged. Its advantage is that the part is continually per-
forming calibration and automatically updating its calibration
coefficients. As a result, the effects of temperature drift, supply
sensitivity and time drift on zero- and full-scale errors are auto-
matically removed. When the background calibration mode is
turned on, the part will remain in this mode until Bits MD2,
MD1, and MD0 of the control register are changed. With back-
ground calibration mode on, the first result from the AD7713
will be incorrect as the full-scale calibration will not have been
performed. For a step change on the input, the second output
update will have settled to 100% of the final value.
Table IV summarizes the calibration modes and the calibration
points associated with them. It also gives the duration from
when the calibration is invoked to when valid data is available to
the user.
Span and Offset Limits
Whenever a system calibration mode is used, there are limits on
the amount of offset and span that can be accommodated. The
range of input span in both the unipolar and bipolar modes for
AIN1 and AIN2 has a minimum value of 0.8
VREF/GAIN and
a maximum value of 2.1
VREF/GAIN. For AIN3, the mini-
mum value is 3.2
VREF/GAIN, while the maximum value is
4.2
VREF/GAIN.
Table IV. Calibration Truth Table
Zero-Scale
Full-Scale
Calibration Type
MD2, MD1, MD0
Calibration
Sequence
Duration
Self-Calibration
0, 0, 1
Shorted Inputs
VREF
1-Step
9
1/Output Rate
System Calibration
0, 1, 0
AIN
2-Step
4
1/Output Rate
System Calibration
0, 1, 1
AIN
2-Step
4
1/Output Rate
System Offset Calibration
1, 0, 0
AIN
VREF
1-Step
9
1/Output Rate
Background Calibration
1, 0, 1
Shorted Inputs
VREF
1-Step
6
1/Output Rate
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