参数资料
| 型号： | AD9774ASZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 12/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT 32MSPS 44MQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 800 |
| 系列： | TxDAC+® |
| 设置时间： | 35ns |
| 位数： | 14 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 1.13W |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 2 电流，单极；2 电流，双极 |
| 采样率（每秒）： | 32M |
–2–
REV. B
AD9774–SPECIFICATIONS
DC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
RESOLUTION
14
Bits
DC ACCURACY1
Integral Linearity Error (INL)
TA = +25°C
±4
LSB
TMIN to TMAX
Differential Nonlinearity (DNL)
TA = +25°C
±3
LSB
TMIN to TMAX
Monotonicity (12-Bit)
GUARANTEED OVER RATED SPECIFICATION TEMPERATURE RANGE
ANALOG OUTPUT
Offset Error
–0.025
+0.025
% of FSR
Gain Error (Without Internal Reference)
–7
±1
+7
% of FSR
Gain Error (With Internal Reference)
+7.5
±1
+7.5
% of FSR
Full-Scale Output Current
2
20
mA
Output Compliance Range
1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current
3
1
A
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance
1
M
TEMPERATURE COEFFICIENTS
Unipolar Offset Drift
0
ppm of FSR/
°C
Gain Drift (Without Internal Reference)
±50
ppm of FSR/
°C
Gain Drift (With Internal Reference)
±100
ppm of FSR/
°C
Reference Voltage Drift
±100
ppm of FSR/
°C
POWER SUPPLY
AVDD
Voltage Range
4
2.7
5.0
5.5
V
Analog Supply Current (IAVDD)
26.5
32
mA
Analog Supply Current in SLEEP Mode (IAVDD)
3.2
5
mA
PLLVDD
Voltage Range
2.7
5.0
5.5
V
Clock Multiplier Supply Current (IPLLVDD)13
17
mA
DVDD
Voltage Range
2.7
5.0
5.5
V
Digital Supply Current at 5 V (IDVDD)
5
123.0
140.0
mA
Digital Supply Current at 5 V in SNOOZE Mode (IDVDD)
42.0
50.0
mA
Digital Supply Current at 3 V (IDVDD)
5
62.0
mA
Nominal Power Dissipation
AVDD and DVDD at 3 V
6
415
mW
AVDD and DVDD at 5 V6
1125
mW
Power Supply Rejection Ratio (PSRR)
7 – AVDD
–0.2
+0.2
% of FSR/V
Power Supply Rejection Ratio (PSRR)7 – PLLVDD
–0.025
+0.025
% of FSR/V
Power Supply Rejection Ratio (PSRR)
7 – DVDD
–0.025
+0.025
% of FSR/V
OPERATING RANGE
–40
+85
°C
NOTES
1Measured at IOUTA driving a virtual ground.
2Nominal full-scale current, IOUTFS, is 32
× the I
REF current.
3Use an external amplifier to drive any external load.
4For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.
5Measured at f
CLOCK = 25 MSPS and fOUT = 1.01 MHz.
6Measured as unbuffered voltage output into 50
R
LOAD at IOUTA and IOUTB, fCLOCK = 32 MSPS and fOUT = 12.8 MHz.
7
±5% power supply variation.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = +5 V, PLLVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, unless otherwise noted)
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