参数资料
| 型号： | AD9774ASZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT 32MSPS 44MQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 800 |
| 系列： | TxDAC+® |
| 设置时间： | 35ns |
| 位数： | 14 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 1.13W |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 2 电流，单极；2 电流，双极 |
| 采样率（每秒）： | 32M |
AD9774
–17–
REV. B
long as the positive compliance range is adhered to. One addi-
tional consideration in this mode is the integral nonlinearity
(INL) as discussed in the Analog Output section of this data
sheet. For optimum INL performance, the single-ended, buff-
ered voltage output configuration is suggested.
AD9774
IOUTA
IOUTB 21
50
VOUTA = 0 TO +0.5V
IOUTFS = 20mA
22
Figure 39. 0 V to +0.5 V Unbuffered Voltage Output
SINGLE-ENDED BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 40 shows a buffered single-ended output configuration in
which the op amp U1 performs an I-V conversion on the AD9774
output current. U1 maintains IOUTA (or IOUTB) at a virtual
ground, thus minimizing the nonlinear output impedance effect
on the DAC’s INL performance as discussed in the Analog
Output section. Although this single-ended configuration typi-
cally provides the best dc linearity performance, its ac distortion
performance at higher DAC update rates may be limited by
U1’s slewing capabilities. U1 provides a negative unipolar output
voltage and its full-scale output voltage is simply the product of
RFB and IOUTFS. The full-scale output should be set within U1’s
voltage output swing capabilities by scaling IOUTFS and/or RFB.
An improvement in ac distortion performance may result with a
reduced IOUTFS since the signal current U1 will be required to
sink will be subsequently reduced.
AD9774
22
IOUTA
IOUTB 21
COPT
200
U1
VOUT = IOUTFS
RFB
IOUTFS = 10mA
RFB
200
Figure 40. Unipolar Buffered Voltage Output
POWER AND GROUNDING CONSIDERATIONS
In systems seeking to simultaneously achieve high speed and
high performance, the implementation and construction of the
printed circuit board design is often as important as the circuit
design. Proper RF techniques must be used in device selection,
placement and routing and supply bypassing and grounding.
Figures 44–49 illustrate the recommended printed circuit board
ground, power and signal plane layouts that are implemented on
the AD9774 evaluation board.
Proper grounding and decoupling should be a primary objective
in any high speed, high resolution system. The AD9774 features
separate analog and digital supply and ground pins to optimize
the management of analog and digital ground currents in a
system. In general, AVDD, the analog supply, should be decoupled
to ACOM, the analog common, as close to the chip as physi-
cally possible. Similarly, DVDD, the digital supply, should be
decoupled to DCOM and PLLVDD, the Phase Lock Loop
Supply, should be decoupled to PLLCOM.
For those applications requiring a single +5 V or +3 V supply
for both the analog, digital supply and Phase Lock Loop supply,
a clean AVDD and/or PLLVDD may be generated using the
circuit shown in Figure 41. The circuit consists of a differential
LC filter with separate power supply and return lines. Lower
noise can be attained using low ESR type electrolytic and tanta-
lum capacitors.
100 F
ELECT.
10-22 F
TANT.
0.1 F
CER.
+5V OR +3V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
TTL/CMOS
LOGIC
CIRCUITS
Figure 41. Differential LC Filter for Single +5 V or +3 V
Applications
Maintaining low noise on power supplies and ground is critical
to obtain optimum results from the AD9774. If properly
implemented, ground planes can perform a host of functions on
high speed circuit boards: bypassing, shielding current trans-
port, etc. In mixed signal design, the analog and digital portions
of the board should be distinct from each other, with the analog
ground plane confined to the areas covering the analog signal
traces, and the digital ground plane confined to areas covering
the digital interconnects.
All analog ground pins of the DAC, reference and other analog
components should be tied directly to the analog ground plane.
The two ground planes should be connected by a path 1/8 to
1/4 inch wide underneath or within 1/2 inch of the DAC to
maintain optimum performance. Care should be taken to ensure
that the ground plane is uninterrupted over crucial signal paths.
On the digital side, this includes the digital input lines running
to the DAC as well as any clock signals. On the analog side, this
includes the DAC output signal, reference signal and the supply
feeders.
The use of wide runs or planes in the routing of power lines is
also recommended. This serves the dual role of providing a low
series impedance power supply to the part, as well as providing
some “free” capacitive decoupling to the appropriate ground
plane. It is essential that care be taken in the layout of signal and
power ground interconnects to avoid inducing extraneous volt-
age drops in the signal ground paths. It is recommended that all
connections be short, direct and as physically close to the pack-
age as possible in order to minimize the sharing of conduction
paths between different currents. When runs exceed an inch in
length, strip line techniques with proper termination resistors
should be considered. The necessity and value of this resistor
will be dependent upon the logic family used.
For a more detailed discussion of the implementation and con-
struction of high speed, mixed signal printed circuit boards,
refer to Analog Devices’ application notes AN-280 and AN-333.
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