- 您现在的位置：买卖IC网 > PDF目录16826 > AD9858/PCBZ (Analog Devices Inc)BOARD EVAL FOR AD9858 PDF资料下载
参数资料
| 型号： | AD9858/PCBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9858 |
| 产品培训模块： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 设计资源： | Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) |
| 标准包装： | 1 |
| 主要目的： | 计时，直接数字合成（DDS） |
| 已用 IC / 零件： | AD9858/TL |
| 已供物品： | 板 |
| 其它名称： | AD9858/PCB AD9858/PCB-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页当前第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
AD9858
Rev. C | Page 28 of 32
EVALUATION BOARDS
The AD9858 has three different evaluation board designs. The
first design is the traditional DDS evaluation board (see Figure 38).
In this design, the DDS is clocked and the output is taken
directly from the DAC. The analog mixer and PLL blocks are
made available for separate evaluation.
The second design is a fractional divide loop (see Figure 39).
This evaluation board was designed to incorporate the DDS, the
phase frequency detector, and the charge pump. In this
application, the DDS is used in a PLL loop. Unlike a fixed
divider used in traditional PLL loops, the output signal is
divided and fed back to the phase frequency detector by the
DDS. To do this, the output signal of the PLL loop is fed to the
DDS as REFCLK. The DDS is programmed to match the
reference input frequency. Because the DDS output frequency
can take on 232 potential values between 0 Hz and one-half of
the PLL loop output frequency, this enables frequency
resolution on the order of 470 MHz, assuming a PLL loop
output frequency of 2 GHz.
The third design is a translation loop or offset loop (see Figure 37).
In this design, the analog mixer is incorporated into the feedback
path of the loop. This allows direct up-conversion to the
transmission frequency.
The three evaluation boards have separate schematics, BOMs, and
instructions. See www.analog.com/dds for more information.
Table 13. Evaluation Boards for the AD9858
Model
Description
AD9858/PCBZ
AD9858 Frequency Synthesizer Board
AD9858/FDPCB
AD9858 Fractional Divide Loop Frequency
Synthesizer Board
AD9858/TLPCBZ
AD9858 Translation Loop Frequency
Synthesizer Board
相关PDF资料 |
PDF描述 |
|---|---|
| AD9956-VCO/PCBZ | BOARD EVAL 14BIT 1.8V 48LFCSP |
| GEM22DRKF | CONN EDGECARD 44POS DIP .156 SLD |
| 362A024-4/86-0 | BOOT MOLDED |
| AD9956/PCBZ | BOARD EVAL FOR AD9956 |
| 0210391089 | CABLE JUMPER 1MM .203M 37POS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9858TLPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858XSV | 制造商:Analog Devices 功能描述: |
| AD9859 | 制造商:AD 制造商全称:Analog Devices 功能描述:400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9859/PCB | 制造商:Analog Devices 功能描述:NCO, 400MSPS 10 BIT, 1.8V CMOS DIRECT DGTL SYNTHESIZER - Bulk |
| AD9859/PCBZ | 功能描述:BOARD EVAL FOR AD9859 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:AgileRF™ 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
发布紧急采购，3分钟左右您将得到回复。