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参数资料
型号： AD9887AKSZ-170
厂商： Analog Devices Inc
文件页数： 38/40页
文件大小： 0K
描述： IC INTRFACE ANALOG/DVI 160-MQFP
标准包装： 24
应用： 图形卡，VGA 接口
接口： 模拟和数字
电源电压： 3.15 V ~ 3.45 V
封装/外壳： 160-BQFP
供应商设备封装： 160-MQFP（28x28）
包装： 托盘
安装类型： 表面贴装
产品目录页面： 788 (CN2011-ZH PDF)
REV. 0
AD9887
–7–
Table I. Complete Pinout List
Pin
Pin
Type
Name
Function
Value
Number
Interface
Analog Video
RAIN
Analog Input for Converter R
0.0 V to 1.0 V
119
Analog
Inputs
GAIN
Analog Input for Converter G
0.0 V to 1.0 V
110
Analog
BAIN
Analog Input for Converter B
0.0 V to 1.0 V
100
Analog
External
HSYNC
Horizontal SYNC Input
3.3 V CMOS
82
Analog
Sync/Clock
VSYNC
Vertical SYNC Input
3.3 V CMOS
81
Analog
Inputs
SOGIN
Input for Sync-on-Green
0.0 V to 1.0 V
108
Analog
CLAMP
Clamp Input (External CLAMP Signal)
3.3 V CMOS
93
Analog
COAST
PLL COAST Signal Input
3.3 V CMOS
84
Analog
CKEXT
External Pixel Clock Input (to Bypass the PLL) to VDD or Ground
3.3 V CMOS
83
Analog
CKINV
ADC Sampling Clock Invert
3.3 V CMOS
94
Analog
Sync Outputs
HSOUT
HSYNC Output Clock (Phase-Aligned with DATACK)
3.3 V CMOS
139
Both
VSOUT
VSYNC Output Clock (Phase-Aligned with DATACK)
3.3 V CMOS
138
Both
SOGOUT
Sync on Green Slicer Output
3.3 V CMOS
140
Analog
Voltage
REFOUT
Internal Reference Output (Bypass with 0.1
F to Ground)
1.25 V
126
Analog
Reference
REFIN
Reference Input (1.25 V
± 10%)
1.25 V
± 10%
125
Analog
Clamp Voltages
RMIDSCV
Red Channel Midscale Clamp Voltage Output
120
Analog
RCLAMPV
Red Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
118
Analog
GMIDSCV
Green Channel Midscale Clamp Voltage Output
111
Analog
GCLAMPV
Green Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
109
Analog
BMIDSCV
Blue Channel Midscale Clamp Voltage Output
101
Analog
BCLAMPV
Blue Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
99
Analog
PLL Filter
FILT
Connection for External Filter Components for Internal PLL
78
Analog
Power Supply
VD
Analog Power Supply
3.3 V
± 10%
Both
VDD
Output Power Supply
3.3 V
± 10%
Both
PVD
PLL Power Supply
3.3 V
± 10%
Both
GND
Ground
0 V
Both
Serial Port
SDA
Serial Port Data I/O
3.3 V CMOS
92
Both
(2-Wire
SCL
Serial Port Data Clock (100 kHz Max)
3.3 V CMOS
91
Both
Serial Interface)
A0
Serial Port Address Input 1
3.3 V CMOS
90
Both
A1
Serial Port Address Input 2
3.3 V CMOS
89
Both
Data Outputs
Red B[7:0]
Port B/Odd Outputs of Converter “Red,” Bit 7 Is the MSB
3.3 V CMOS
153–160
Both
Green B[7:0]
Port B/Odd Outputs of Converter “Green,” Bit 7 Is the MSB
3.3 V CMOS
13–20
Both
Blue B[7:0]
Port B/Odd Outputs of Converter “Blue,” Bit 7 Is the MSB
3.3 V CMOS
33–40
Both
Red A[7:0]
Port A/Even Outputs of Converter “Red,” Bit 7 Is the MSB
3.3 V CMOS
143–150
Both
Green A[7:0]
Port A/Even Outputs of Converter “Green,” Bit 7 Is the MSB
3.3 V CMOS
3–10
Both
Blue A[7:0]
Port A/Even Outputs of Converter “Blue,” Bit 7 Is the MSB
3.3 V CMOS
23–30
Both
Data Clock
DATACK
Data Output Clock for the Analog and Digital Interface
3.3 V CMOS
134
Both
Outputs
DATACK
Data Output Clock Complement for the Analog Interface Only
3.3 V CMOS
135
Both
Sync Detect
SCDT
Sync Detect Output
3.3 V CMOS
136
Both
Scan Function
SCANIN
Input for SCAN Function
3.3 V CMOS
129
Both
SCANOUT
Output for SCAN Function
3.3 V CMOS
45
Both
SCANCLK
Clock for SCAN Function
3.3 V CMOS
50
Both
No Connect
NC
These Pins Should be Left Unconnected
71–73
Both
Digital Video
Rx0+
Digital Input Channel 0 True
62
Digital
Data Inputs
Rx0–
Digital Input Channel 0 Complement
63
Digital
Rx1+
Digital Input Channel 1 True
59
Digital
Rx1–
Digital Input Channel 1 Complement
60
Digital
Rx2+
Digital Input Channel 2 True
56
Digital
Rx2–
Digital Input Channel 2 Complement
57
Digital
Digital Video
Rxc+
Digital Data Clock True
65
Digital
Clock Inputs
Rxc–
Digital Data Clock Complement
66
Digital
Data Enable
DE
Data Enable
3.3 V CMOS
137
Digital
Control Bits
CTL[0:3]
Decoded Control Bits
3.3 V CMOS
46–49
Digital
RTERM
Sets Internal Termination Resistance
53
Digital
OBSOLETE
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