- 您现在的位置：买卖IC网 > PDF目录10979 > AD9959BCPZ (Analog Devices Inc)IC DDS QUAD 10BIT DAC 56LFCSP PDF资料下载
参数资料
| 型号： | AD9959BCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/44页 |
| 文件大小： | 0K |
| 描述： | IC DDS QUAD 10BIT DAC 56LFCSP |
| 产品培训模块： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 设计资源： | Phase Coherent FSK Modulator (CN0186) |
| 标准包装： | 1 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 500MHz |
| 调节字宽（位）： | 32 b |
| 电源电压： | 1.71 V ~ 1.96 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 56-LFCSP-VQ（8x8） |
| 包装： | 托盘 |
| 产品目录页面： | 552 (CN2011-ZH PDF) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页
AD9959
Rev. B | Page 19 of 44
MODES OF OPERATION
There are many combinations of modes (for example, single-
tone, modulation, linear sweep) that the AD9959 can perform
simultaneously. However, some modes require multiple data
pins, which can impose limitations. The following guidelines
can help determine if a specific combination of modes can be
performed simultaneously by the AD9959.
CHANNEL CONSTRAINT GUIDELINES
Single-tone mode, two-level modulation mode, and linear
sweep mode can be enabled on any channel and in any
combination at the same time.
Any one or two channels in any combination can perform
four-level modulation. The remaining channels can be in
single-tone mode.
Any channel can perform eight-level modulation. The
three remaining channels can be in single-tone mode.
Any channel can perform 16-level direct modulation. The
three remaining channels can be in single-tone mode.
The RU/RD function can be used on all four channels in
single-tone mode. See the Output Amplitude Control
Mode section for the RU/RD function.
When Profile Pin P2 and Profile Pin P3 are used for RU/RD,
any two channels can perform two-level modulation with
RU/RD or any two channels can perform linear frequency
or phase sweep with RU/RD. The other two channels can
be in single-tone mode.
When Profile Pin P3 is used for RU/RD, any channel can
be used in eight-level modulation with RU/RD. The other
three channels can be in single-tone mode.
When the SDIO_1, SDIO_2, and SDIO_3 pins are used for
RU/RD, any one or two channels, any three channels, or
all four channels can perform two-level modulation with
RU/RD. Any channels not in the two-level modulation can
be in single-tone mode.
When the SDIO_1, SDIO_2, and SDIO_3 pins are used for
RU/RD, any one or two channels can perform four-level
modulation with RU/RD. Any channels not in four-level
modulation can be in single-tone mode.
When the SDIO_1, SDIO_2, and SDIO_3 pins are used for
RU/RD, any channel can perform 16-level modulation with
RU/RD. The other three channels can be in single-tone mode.
Amplitude modulation, linear amplitude sweep modes,
and the RU/RD function cannot operate simultaneously,
but frequency and phase modulation can operate simulta-
neously as the RU/RD function.
POWER SUPPLIES
The AVDD and DVDD supply pins provide power to the DDS
core and supporting analog circuitry. These pins connect to a
1.8 V nominal power supply.
The DVDD_I/O pin connects to a 3.3 V nominal power supply.
All digital inputs are 3.3 V logic except for the CLK_MODE_SEL
input. CLK_MODE_SEL (Pin 24) is an analog input and should
be operated by 1.8 V logic.
SINGLE-TONE MODE
Single-tone mode is the default mode of operation after a master
reset signal. In this mode, all four DDS channels share a common
address location for the frequency tuning word (Register 0x04)
and phase offset word (Register 0x05). Channel enable bits are
provided in combination with these shared addresses. As a
result, the frequency tuning word and/or phase offset word can
be independently programmed between channels (see the
following Step 1 through Step 5). The channel enable bits do not
require an I/O update to enable or disable a channel.
See the Register Maps and Bit Descriptions section for a
description of the channel enable bits in the channel select
register (CSR, Register 0x00). The channel enable bits are
enabled or disabled immediately after the CSR data byte is
written.
Address sharing enables channels to be written simultaneously,
if desired. The default state enables all channel enable bits.
Therefore, the frequency tuning word and/or phase offset word
is common to all channels but written only once through the
serial I/O port.
The following steps present a basic protocol to program a
different frequency tuning word and/or phase offset word for
each channel using the channel enable bits.
1.
Power up the DUT and issue a master reset. A master reset
places the part in single-tone mode and single-bit mode for
serial programming operations (refer to the Serial I/O Modes
of Operation section). Frequency tuning words and phase
offset words default to 0 at this point.
2.
Enable only one channel enable bit (Register 0x00) and
disable the other channel enable bits.
3.
Using the serial I/O port, program the desired frequency
tuning word (Register 0x04) and/or the phase offset word
(Register 0x05) for the enabled channel.
4.
Repeat Step 2 and Step 3 for each channel.
5.
Send an I/O update signal. After an I/O update, all
channels should output their programmed frequency
and/or phase offset value.
相关PDF资料 |
PDF描述 |
|---|---|
| VE-2WT-IY-F2 | CONVERTER MOD DC/DC 6.5V 50W |
| VE-2WR-IY-F4 | CONVERTER MOD DC/DC 7.5V 50W |
| VE-2WR-IY-F1 | CONVERTER MOD DC/DC 7.5V 50W |
| VE-2WP-IY-F3 | CONVERTER MOD DC/DC 13.8V 50W |
| VE-2WN-IY-F2 | CONVERTER MOD DC/DC 18.5V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9959BCPZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs |
| AD9959BCPZ-REEL7 | 功能描述:IC DDS QUAD 10BIT DAC 56LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 直接数字合成 (DDS) 系列:- 产品变化通告:Product Discontinuance 27/Oct/2011 标准包装:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 调节字宽（位）:32 b 电源电压:2.97 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| AD9959BCPZ-REEL71 | 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs |
| AD995PCBZ | 制造商:AD 制造商全称:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
| AD9960BSTZ | 功能描述:RFID应答器 MxFE for RFID Reader Transceiver RoHS:否 制造商:Murata 存储容量:512 bit 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。