- 您现在的位置：买卖IC网 > PDF目录11659 > AD9991KCPZ (Analog Devices Inc)IC CCD SIGNAL PROCESSOR 56-LFCSP PDF资料下载
参数资料
| 型号： | AD9991KCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/60页 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 56-LFCSP |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，10 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 56-LFCSP-VQ（8x8） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
AD9991
–24–
VERTICAL TIMING EXAMPLE
To better understand how the AD9991 vertical timing generation
is used, consider the example CCD timing chart in Figure 25.
This particular example illustrates a CCD using a general 3-eld
readout technique. As described in the previous Field section,
each readout eld should be divided into separate regions to
perform each step of the readout. The sequence change posi-
tions (SCP) determine the line boundaries for each region, and
the VSEQSEL registers will then assign a particular V-sequence
to each region. The V-sequences will contain the specic timing
information required in each region: V1–V6 pulses (using VPAT
groups), HBLK/CLPOB timing, and VSG patterns for the SG
active lines.
This particular timing example requires four regions for each
of the three elds, labeled Region 0, Region 1, Region 2, and
Region 3. Because the AD9991 allows up to six individual elds
to be programmed, the Field 0, Field 1, and Field 2 registers can
be used to meet the requirements of this timing example. The
four regions for each eld are very similar in this example, but
the individual registers for each eld allow exibility to accom-
modate other timing charts.
Region 0 is a high speed vertical shift region. Sweep mode can be
used to generate this timing operation, with the desired number
of high speed vertical pulses needed to clear any charge from the
CCD’s vertical registers.
Region 1 consists of only two lines, and uses standard single line
vertical shift timing. The timing of this region area will be the
same as the timing in Region 3.
Region 2 is the sensor gate line, where the VSG pulses transfer the
image into the vertical CCD registers. This region may require the
use of the second V-pattern group for SG active line.
Region 3 also uses the standard single line vertical shift timing,
the same timing as Region 1.
In summary, four regions are required in each of the three elds.
The timing for Regions 1 and 3 is essentially the same, reducing
the complexity of the register programming.
Other registers will need to be used during the actual readout
operation, such as the MODE register, shutter control registers
(TRIGGER, SUBCK, VSUB, MSHUT, STROBE), and the AFE
gain register. These registers will be explained in other examples.
Important Note About Signal Polarities
When programming the AD9991 to generate the V1–V6,
VSG1–VSG5, and SUBCK signals, it is important to note that
the V-driver circuit usually inverts these signals. Carefully check
the required timing signals needed at the input and output of
the V-driver circuit being used, and adjust the polarities of the
AD9991 outputs accordingly.
REV. 0
相关PDF资料 |
PDF描述 |
|---|---|
| VE-JN4-IZ-B1 | CONVERTER MOD DC/DC 48V 25W |
| VE-JN4-IY-F4 | CONVERTER MOD DC/DC 48V 50W |
| VE-JN4-IY-F2 | CONVERTER MOD DC/DC 48V 50W |
| AD9923ABBCZRL | IC PROCESSOR CCD 12BIT 105CSPBGA |
| 1-413589-1 | CONN PLUG BNC JIS 3C-2V CRIMP AU |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9991KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
| AD9992 | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
| AD9992_07 | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
| AD9992BBCZ | 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
| AD9992BBCZRL | 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
发布紧急采购，3分钟左右您将得到回复。