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| 型号： | AD9991KCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/60页 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 56-LFCSP |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，10 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 56-LFCSP-VQ（8x8） |
| 包装： | 带卷 (TR) |
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AD9991
–27–
If the exposure is generated using the TRIGGER register and the
EXPOSURE register is set to zero, the behavior of the SUBCK
will not be any different than the normal shutter or high precision
shutter operations, in which the TRIGGER register is not used.
SUBCK Suppression
Normally, the SUBCKs will begin to pulse on the line following
the sensor gate line (VSG). With some CCDs, the SUBCK pulse
needs to be suppressed for one or more lines following the VSG
line. The SUBCKSUPPRESS register allows for suppression of
the SUBCK pulses for additional lines following the VSG line.
Readout after Exposure
After the exposure, the readout of the CCD data occurs, beginning
with the sensor gate (VSG) operation. By default, the AD9991 is
generating the VSG pulses in every eld. In the case where only a
single exposure and single readout frame are needed, such as the
CCD’s preview mode, the VSG and SUBCK pulses can be oper-
ating in every eld.
However in many cases, during readout the SUBCK output
needs to be further suppressed until the readout is completed.
The READOUT register species the number of additional
elds after the exposure to continue the suppression of SUBCK.
READOUT can be programmed for zero to seven additional
elds, and should be preprogrammed at startup, not at the same
time as the exposure write. A typical interlaced CCD frame read-
out mode will generally require two additional elds of SUBCK
suppression (READOUT = 2). A 3-eld, 6-phase CCD will
require three additional elds of SUBCK suppression after the
readout begins (READOUT = 3).
If the SUBCK output is required to start back up during the last
eld of readout, simply program the READOUT register to one
less than the total number of CCD readout elds.
Like the exposure operation, the readout operation must be trig-
gered by using the TRIGGER register.
Using the TRIGGER Register
As described previously, by default the AD9991 will output the
SUBCK and VSG signals on every eld. This works well for con-
tinuous single eld exposure and readout operations, such as the
CCD’s live preview mode. However, if the CCD requires a longer
exposure time, or if multiple readout elds are needed, then the
TRIGGER register is needed to initiate specic exposure and
readout sequences.
Typically, the exposure and readout bits in the TRIGGER
register are used together. This will initiate a complete exposure-
plus-readout operation. Once the exposure has been completed,
the readout will automatically occur. The values in the EXPO-
SURE and READOUT registers will determine the length of
each operation.
VD
SUBCK
NOTES
1. SUBCK MAY BE SUPPRESSED FOR MULTIPLE FIELDS BY PROGRAMMING THE EXPOSURE REGISTER GREATER THAN ZERO.
2. ABOVE EXAMPLE USES EXPOSURE = 1.
3. TRIGGER REGISTER MUST ALSO BE USED TO START THE LOW SPEED EXPOSURE.
4. VD/HD OUTPUTS MAY ALSO BE SUPPRESSED USING THE VDHDOFF REGISTER = 1.
t
EXP
VSG
TRIGGER
EXPOSURE
Figure 28. Low Speed Shutter Mode Using EXPOSURE Register
Table XI. Shutter Mode Register Parameters
Register
Length
Range
Description
TRIGGER
5b
On/Off for Five Signals
Trigger for VSUB [0], MSHUT [1], STROBE [2], Exposure [3],
and Readout Start [4]
READOUT
3b
0–7 # of Fields
Number of Fields to Suppress SUBCK after Exposure
EXPOSURE
12b
0–4095 # of Fields
Number of Fields to Suppress to SUBCK and VSG during
Exposure Time (Low Speed Shutter)
VDHDOFF
1b
On/Off
Disable VD/HD Output during Exposure (1 = On, 0 = Off)
SUBCKPOL
*
1b
High/Low
SUBCK Start Polarity for SUBCK1 and SUBCK2
SUBCK1TOG
*
24b
0–4095 Pixel Locations
Toggle Positions for First SUBCK Pulse (Normal Shutter)
SUBCK2TOG
*
24b
0–4095 Pixel Locations
Toggle Positions for Second SUBCK Pulse in Last Line
(High Precision)
SUBCKNUM
*
12b
1–4095 # of Pulses
Total Number of SUBCKs per Field, at One Pulse per Line
SUBCKSUPPRESS
*
12b
0–4095 # of Pulses
Number of Lines to Further Suppress SUBCK after the VSG Line
*Register is not VD updated, but is updated at the start of line after sensor gate line.
REV. 0
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| AD9991KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
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| AD9992BBCZ | 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
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