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参数资料
| 型号： | ADAV801ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 54/60页 |
| 文件大小： | 0K |
| 描述： | IC CODEC AUDIO R-DVD 3.3V 64LQFP |
| 标准包装： | 1 |
| 类型： | 音频编解码器 |
| 数据接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 数量： | 2 / 2 |
| 三角积分调变： | 无 |
| 动态范围，标准 ADC / DAC (db)： | 102 / 101 |
| 电压 - 电源，模拟： | 3 V ~ 3.6 V |
| 电压 - 电源，数字： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 配用： | EVAL-ADAV801EBZ-ND - BOARD EVALUATION FOR ADAV801 |
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ADAV801
Rev. A | Page 58 of 60
LAYOUT CONSIDERATIONS
Getting the best performance from the ADAV801 requires a
careful layout of the printed circuit board (PCB). Using separate
analog and digital ground planes is recommended, because
these give the currents a low resistance path back to the power
supplies. The ground planes should be connected in only one
place, usually under the ADAV801, to prevent ground loops.
The analog and digital supply pins should be decoupled to their
respective ground pins with a 10 μF to 47 μF tantalum capacitor
and a 0.1 μF ceramic capacitor. These capacitors should be
placed as close as possible to the supply pins.
ADC
The ADC uses a switch capacitor input stage and is, therefore,
particularly sensitive to digital noise. Sources of noise, such as
PLLs or clocks, should not be routed close to the ADC section.
The CAPxN and CAPxP pins form a charge reservoir for the
switched capacitor section of the ADC, so keeping these nodes
electrically quiet is a key factor in ensuring good performance.
The capacitors connected to these pins should be of good
quality, either NPO or COG, and should be placed as close as
possible to CAPxN and CAPxP.
DAC
The DAC requires an analog filter to filter out-of-band noise
from the analog output. A third-order Bessel filter is
recommended, although the filter to use depends on the
requirements of the application.
PLL
The PLL can be used to generate digital clocks, either for use
internally or to clock external circuitry. Because every clock is a
potential source of noise, care should be taken when using the
PLL. The ADAV801’s PLL outputs can be enabled or disabled,
as required. If the PLL clocks are not required by external
circuitry, it is recommended that the outputs be disabled. To
reduce cross-coupling between clocks, a digital ground trace
can be routed on either side of the PLL clock signal, if required.
The PLL has its own power supply pins. To get the best
performance from the PLL and from the rest of the ADAV801,
it is recommended that a separate analog supply be used. Where
this is not possible, the user must decide whether to connect the
PLL supply to the analog (AVDD) or digital (DVDD) supply.
Connecting the PLL supply to AVDD gives the best jitter
performance, but can degrade the performance of the ADC and
DAC sections slightly due to the increased digital noise created
on the AVDD by the PLL. Connecting the PLL supply to DVDD
keeps digital noise away from the analog supply, but the jitter
specifications might be reduced depending on the quality of the
digital supply. Using the layout recommendations described in
this section helps to reduce these effects.
RESET AND POWER-DOWN CONSIDERATIONS
When the ADAV801 is held in reset by bringing the RESET
pin low, a number of circuit blocks remain powered up. For
example, the crystal oscillator circuit based around the XIN
and XOUT pins is still active, so that a stable clock source is
available when the ADAV801 is taken out of reset. In addition,
the VCO associated with the S/PDIF receiver is active so that
the receiver locks to the incoming S/PDIF stream in the shortest
possible time. Where power consumption is a concern, the
individual blocks of the ADAV801 can be powered down via
the control registers to gain significant power savings. Table 146
shows typical power savings when using the power-down bits
in the control registers.
Table 146. Typical Power Requirements
Operating
Mode
AVDD
(mA)
DVDD
(mA)
ODVDD
(mA)
DIR_VDD
(mA)
Power
(mW)
Normal
50
25
5
280.5
Reset low
30
4
2.5
1
123.75
Power-down
bits
12
0.1
1.3
0.7
46.53
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相关代理商/技术参数 |
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|---|---|
| ADAV801ASTZ-REEL | 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率（位）:18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比，标准 ADC / DAC (db):81.5 / 88 动态范围，标准 ADC / DAC (db):82 / 87.5 电压 - 电源，模拟:2.6 V ~ 3.3 V 电压 - 电源，数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP（7x7） 包装:带卷 (TR) |
| ADAV802AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
| ADAV802ASTZ | 制造商:Analog Devices 功能描述: |
| ADAV803 | 制造商:AD 制造商全称:Analog Devices 功能描述:Audio Codec for Recordable DVD |
| ADAV803AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
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