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参数资料
| 型号： | ADM1075-2ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/52页 |
| 文件大小： | 0K |
| 描述： | IC HOT SWAP CTRLR -48V 28LFCSP |
| 标准包装： | 1 |
| 类型： | 热交换控制器 |
| 应用： | -48V 远程电力系统，高可用性，电信/数据通信系统 |
| 内部开关： | 无 |
| 电流限制： | 可调 |
| 电源电压： | -35 V ~ -80 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 28-LFCSP-WQ（5x5） |
| 包装： | 托盘 |
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ADM1075
Data Sheet
FET
DRAIN
I DRAIN =
50μA MAX
R DRAIN DRAIN
2V
11V
GATE
DIODE CLAMPS
DRAIN TO 2V
S Q
R Q
PWRGD
GPO2/ALERT2 low after seven retry attempts). A switch
shorting UVH or UVL to VEE works as an on/off switch.
RESTART
The RESTART pin is a falling edge triggered input that allows
the user to command a 10 second automatic restart. When this
input is set low, the gate turns off for 10 seconds, and then powers
back up. The pin is falling edge triggered; therefore, holding
HOT SWAP
DISABLE
SIGNAL
Figure 53. Generation of PWRGD Signal
DRAIN
Because the source of the FET is always at or near the most
negative system supply, the drain voltage is a close approxima-
tion to the V DS of the FET. When the voltage at the DRAIN pin
is less than 2 V, it is assumed the FET is turned on. The DRAIN
pin is used by the power-good circuitry to determine when
PWRGD can be asserted. A resistor is required on the DRAIN
pin to limit current on the pin to 50 μA. A 2 M? resistor is
suitable to limit the current in most cases.
SPLYGD
The SPLYGD output indicates when the input supply is within
the programmed voltage window. This is an open-drain output.
An external pull-up resistor is required on this pin.
LATCH
The LATCH output signals that the device has latched off after
an overcurrent fault. This pin is also used to configure the
desired retry scheme. See the Hot Swap Fault Retry section
for additional details.
SHDN
The SHDN pin is a level-triggered input that allows the user to
command a shutdown of the hot swap function. When this
input is set low, the GATE output is switched to VEE to turn the
FET off. This pin has an internal pull-up of approximately 8 μA,
allowing it to be driven by an open-drain pull-down output or a
push-pull output. The input threshold is ~1 V.
This pin is also used to configure the desired retry scheme. See
the Hot Swap Fault Retry section for additional details.
Take care if using the SHDN pin as an on/off pin. Pulling the
SHDN low always turns off the gate. However, taking SHDN
high again turns on hot swap only if there have been less than
seven faults/shutdown events within a 10 second period. The
retry scheme is configured to set GPO2/ALERT2 low after
seven faults. The SHDN pin cannot clear the GPO2/ALERT2
fault. The retry counter is cleared after 10 seconds of power
good. Therefore, this is not an issue if there is never going to be
more than seven SHDN events within a 10 second period.
The UVH or UVL pin may work better as a system on/off pin if
required. Toggling the UVx pin clears any faults (including
RESTART low for more than 10 seconds generates only one
restart. This pin has an internal pull-up of approximately 8 μA,
allowing it to be driven by an open-drain pull-down output or a
push-pull output. The input threshold is ~1 V.
This pin is also used to configure the desired retry scheme. See
the Hot Swap Fault Retry section for additional details.
FET HEALTH
The ADM1075 features a method of detecting a shorted pass
FET. The FET health status can be used to generate an alert on
the GPO1/ALERT1/CONV and GPO2/ALERT2 pins. By default,
at power-up, an alert is generated on GPO1/ALERT1/CONV if
the FET health status indicates a bad FET is present. FET health
is considered bad if all of the following conditions are true:
? The ADM1075 is holding the FET off, for example, during
the initial power-on cycle time.
? V SENSE > 2 mV for the ADM1075-1 and 4 mV for the
? V GATE < ~1 V.
POWER MONITOR
The ADM1075 features an integrated ADC that accurately
measures the current sense voltage and the ADC_V voltage.
It can also optionally monitor the ADC_AUX voltage. The
measured input voltage (ADC_V) and the current being
delivered to the load are multiplied to give a power value that
can be read back. Each power value is also added to an accumula-
tor that can be read back to allow an external device to calculate
the energy consumption of the load.
The PEAK_IOUT, PEAK_VIN, and PEAK_VAUX commands
can be used to read the highest peak current or voltage since the
value was last cleared.
An averaging function is provided for voltage and current that
This function reduces the need for postprocessing of sampled
data by the host processor. The number of samples that can be
averaged is 2 N , where N is in the range of 0 to 7.
The power monitor current sense amplifier is bipolar and can
measure both positive and negative currents. It has two input
ranges and can be selected using the PMBus interface. The
input ranges are ±25 mV and ±50 mV.
The two basic modes of operation for the power monitor are
single shot and continuous. In single-shot mode, the power
monitor samples the input voltage and current a number of
times, depending on the averaging value selected by the user.
Rev. C | Page 26 of 52
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