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参数资料
| 型号： | ADMCF328BR |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 10 MHz, OTHER DSP, PDSO28 |
| 封装： | SOIC-28 |
| 文件页数： | 16/36页 |
| 文件大小： | 993K |
| 代理商： | ADMCF328BR |
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ADMCF328
–23–
REV. A
SYSTEM CONTROLLER
The system controller block of the ADMCF328 performs the
following functions:
1. Manages the interface and data transfer between the DSP core
and the motor control peripherals.
2. Handles interrupts generated by the motor control peripherals
and generates a DSP core interrupt signal
IRQ2.
3. Controls the ADC multiplexer select lines.
4. Enables
PWMTRIP and PWMSYNC interrupts.
5. Controls the multiplexing of the SPORT1 pins to select
either DR1A or DR1B data receive pins. It also allows con-
guration of SPORT1 as a UART interface.
6. Controls the PWM single/double update mode.
7. Controls the ADC conversion time modes.
8. Controls the auxiliary PWM operation mode.
9. Contains a status register (SYSSTAT) that indicates the state
of the
PWMTRIP pin, the watchdog timer, and the PWM
timer.
10. Performs a reset of the motor control peripherals and control
registers following a hardware, software, or watchdog initi-
ated reset.
SPORT1 Control
Both data receive pins are multiplexed internally into the single
data receive input of SPORT1 as shown in Figure 20. Two con-
trol bits in the MODECTRL register control the state of the
SPORT1 pins by manipulating internal multiplexers in the
ADMCF328.
DSP
CORE
SPORT1
PIO4/DR1A
PIO2/DR1B
PIO0/TFS1
PIO5/RFS1
PIO3/SCLK1
MODECTRL (5 . . . 4)
UARTEN
DR1SEL
DT1
DR1
TFS1
RFS1
SCLK1
FL1
ADMCF328
PIO1/DT1
Figure 20. Internal Multiplexing of SPORT1 Pins
Bit 4 of the MODECTRL register (DR1SEL) selects between the
two data receive pins. Setting Bit 4 of MODECTRL connects pin
DR1B to the internal data receive port DR1 of SPORT1. Clearing
Bit 4 connects DR1A to DR1.
Setting Bit 5 of the MODECTRL register (SPORT1 Mode) con-
gures the serial port for UART mode. In this mode, the DR1 and
RFS1 pins of the internal serial port are connected together. Addi-
tionally, setting the SPORT1 Mode bit connects the FL1 flag of
the DSP to the external PIO5/RFS1 pin.
Flag Pins
The ADMCF328 provides flag pins. The alternate conguration
of SPORT1 includes a Flag In (FI) and Flag Out (FO) pin.
This alternate conguration of SPORT1 is selected by Bit 10 of
the DSP system control register, SYSCNTL at data memory
address, 0x3FFF. In the alternate conguration, the DR1 pin
(either DR1A or DR1B depending upon the state of the DR1SEL
bit) becomes the FI pin and the DT1 pin becomes the FO pin.
Additionally, RFS1 is congured as the
IRQ0 interrupt input
and TFS1 is congured as the
IRQ1 interrupt. The serial port
clock, SCLK1, is still available in the alternate conguration.
Development Tools
Users are recommended to obtain the ADMCF328-EVALKIT
from Analog Devices. The tool kit contains everything required
to quickly and easily evaluate and develop applications using the
ADMCF328 and ADMC328 DSP Motor Controllers. Please
contact your ADI sales representative for ordering information.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADMCF328BR-REEL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADMCF328-EVALKIT | 制造商:未知厂家 制造商全称:未知厂家 功能描述:28-Lead Flash Memory DSP Motor Controller with Current Sense(993.76 k) |
| ADMCF328PB | 制造商:AD 功能描述:328 ANALOG DEVICE S6H1X |
| ADMCF328-PB | 制造商:Analog Devices 功能描述:STAND ALONE PROCESSOR BOARD |
| ADMCF340 | 制造商:AD 制造商全称:Analog Devices 功能描述:DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
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