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参数资料
| 型号： | ADN2525ACPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC LASER DRIVER 10.7GBPS 16LFCSP |
| 标准包装： | 1,500 |
| 类型： | 激光二极管驱动器（光纤） |
| 数据速率： | 10.7Gbps |
| 通道数： | 1 |
| 电源电压： | 3.07 V ~ 3.53 V |
| 电流 - 电源： | 39mA |
| 电流 - 调制： | 80mA |
| 电流 - 偏置： | 100mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
ADN2525
The equivalent circuits of the BSET, IBIAS, and IBMON pins
VCC
The function of the inductor L is to isolate the capacitance of
the IBIAS output from the high frequency signal path. For
BSET
VCC
AUTOMATIC LASER SHUTDOWN (ALS)
800 ?
200 ?
Figure 20. Equivalent Circuit of the BSET Pin
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
Table 5.
VCC
IBIAS
VCC
2k ?
ALS Logic State
High
Low
Floating
IBIAS and IMOD
Disabled
Enabled
Enabled
100 ?
2 ?
The ALS pin is compatible with 3.3 V CMOS and TTL logic
Figure 21. Equivalent Circuit of the IBIAS Pin
VCC
VCC
VCC
VCC
500 ?
ALS
100 ?
50k ?
2k ?
Figure 24. Equivalent Circuit of the ALS Pin
100 ?
VCC
IBMON
Figure 22. Equivalent Circuit of the IBMON Pin
The recommended configuration for BSET, IBIAS, and IBMON
TO LASER CATHODE
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current by using a voltage-to-current converter using an
operational amplifier and a bipolar transistor, as shown in
VCC
L
IBIAS
IMODP
IBIAS
50 ?
IMOD
IMODN
ADN2525
BSET
IBMON
FROM INPUT STAGE
V BSET
GND
R IBMON
1k ?
MSET
800 ?
Figure 23. Recommended Configuration for the BSET, IBIAS, and IBMON Pins
ADN2525
The circuit used to drive the BSET voltage must be able to drive
the 1 kΩ input resistance of the BSET pin. For proper operation
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
V COMPLIANCE_MAX (V) = VCC (V) ? 0.75 ? 4.4 × IBIAS (A)
See the Applications Information section for examples of
headroom calculations.
200 ?
GND
Figure 25. Generation of Modulation Current on the ADN2525
This dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and gained up by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins.
The output stage also generates the active back-termination,
which provides proper transmission line termination. Active
back-termination uses feedback around an active circuit to
synthesize a broadband termination resistance. This provides
Rev. A | Page 10 of 16
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