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参数资料
| 型号： | ADN2525ACPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC LASER DRIVER 10.7GBPS 16LFCSP |
| 标准包装： | 1,500 |
| 类型： | 激光二极管驱动器（光纤） |
| 数据速率： | 10.7Gbps |
| 通道数： | 1 |
| 电源电压： | 3.07 V ~ 3.53 V |
| 电流 - 电源： | 39mA |
| 电流 - 调制： | 80mA |
| 电流 - 偏置： | 100mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
ADN2525
THEORY OF OPERATION
As shown in Figure 1, the ADN2525 consists of an input stage
and two voltage-controlled current sources for bias and
modulation. The bias current is available at the IBIAS pin. It is
controlled by the voltage at the BSET pin and can be monitored
at the IBMON pin. The differential modulation current is
available at the IMODP and IMODN pins. It is controlled by
the voltage at the MSET pin. The output stage implements the
The ADN2525 input stage must be ac-coupled to the signal
source to eliminate the need for matching between the common-
mode voltages of the data signal source and the input stage of
the driver (see Figure 18). The ac-coupling capacitors should
have an impedance less than 50 Ω over the required frequency
range. Generally, this is achieved using 10 nF to 100 nF capacitors.
active back-match circuitry for proper transmission line
matching and power consumption reduction. The ADN2525
50 ?
50 ?
C
ADN2525
DATAP
can drive a load having differential resistance ranging from 5 Ω
to 50 Ω. The excellent back-termination in the ADN2525
absorbs signal reflections from the TOSA end of the output
transmission lines, enabling excellent optical eye quality to be
achieved even when the TOSA end of the output transmission
lines is significantly misterminated.
INPUT STAGE
The input stage of the ADN2525 converts the data signal applied
to the DATAP and DATAN pins to a level that ensures proper
operation of the high speed switch. The equivalent circuit of the
DATAN
C
DATA SIGNAL SOURCE
Figure 18. AC-Coupling the Data Source to the ADN2525 Data Inputs
BIAS CURRENT
The bias current is generated internally using a voltage-to-current
converter consisting of an internal operational amplifier and a
VCC
ADN2525
R
VCC
R
DATAP
50 ?
VCC
I BMON
VCC
50 ?
BSET
800 ?
I BIAS
IBMON
IBIAS
DATAN
200 ?
200 ?
2 ?
GND
Figure 17. Equivalent Circuit of the Input Stage
The DATAP and DATAN pins are terminated internally with a
100 Ω differential termination resistor. This minimizes signal
reflections at the input, which could otherwise lead to degradation
in the output eye diagram. It is not recommended to drive the
ADN2525 with single-ended data signal sources.
Figure 19. Voltage-to-Current Converter Used to Generate IBIAS
The voltage-to-current conversion factor is set at 100 mA/V by
the internal resistors, and the bias current is monitored using a
current mirror with a gain equal to 1/100. By connecting a 1 kΩ
resistor between IBMON and GND, the bias current can be
monitored as a voltage across the resistor. A low temperature
coefficient precision resistor must be used for the IBMON
resistor (R IBMON ). Any error in the value of R IBMON due to
tolerances, or drift in its value over temperature, contributes to
the overall error budget for the IBIAS monitor voltage. If the
IBMON voltage is being connected to an ADC for A/D
conversion, R IBMON should be placed close to the ADC to
minimize errors due to voltage drops on the ground plane.
Rev. A | Page 9 of 16
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