参数资料
型号: ADN2525ACPZ-REEL7
厂商: Analog Devices Inc
文件页数: 11/16页
文件大小: 0K
描述: IC LASER DRIVER 10.7GBPS 16LFCSP
标准包装: 1,500
类型: 激光二极管驱动器(光纤)
数据速率: 10.7Gbps
通道数: 1
电源电压: 3.07 V ~ 3.53 V
电流 - 电源: 39mA
电流 - 调制: 80mA
电流 - 偏置: 100mA
工作温度: -40°C ~ 85°C
封装/外壳: 16-VFQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-VQ
包装: 带卷 (TR)
安装类型: 表面贴装
ADN2525
excellent transmission line termination, while dissipating less
power than a traditional resistor passive back-termination. No
portion of the modulation current flows in the active back-
termination resistance. All of the preset modulation current
IMOD, the range specified in Table 1, flows in the external load.
The equivalent circuits for MSET, IMODP, and IMODN are
shown in Figure 26 and Figure 27. The two 25 Ω resistors in
Figure 27 are not real resistors; they represent the active back-
The ratio between the voltage applied to the MSET pin and the
differential modulation current available at the IMODP and
IMODN pins is a function of the load resistance value, as shown
210
200
190
180
termination resistance.
MSET
VCC
800 ?
VCC
170
160
150
140
130
120
110
MAXIMUM
TYPICAL
MINIMUM
100
200 ?
Figure 26. Equivalent Circuit of the MSET Pin
90
80
70
VCC
IMODN
IMODP
VCC
60
0
5
10
15 20 25 30 35 40 45
DIFFERENTIAL LOAD RESISTANCE
50
55
25 ?
3.3 ?
3.3 ?
25 ?
Figure 29. MSET Voltage-to-Modulation Current Ratio vs.
Differential Load Resistance
Using the resistance of the TOSA, the user can calculate the
voltage range that should be applied to the MSET pin to generate
the required modulation current range (see the example in the
Figure 27. Equivalent Circuit of the IMODP and IMODN Pins
The recommended configuration of the MSET, IMODP,
and IMODN pins is shown in Figure 28. See Table 6 for
recommended components.
The circuit used to drive the MSET voltage must be able to
drive the 1 kΩ resistance of the MSET pin. To be able to drive
80 mA modulation currents through the differential load, the
output stage of the ADN2525 (the IMODP and IMODN pins)
must be ac-coupled to the load. The voltages at these pins have
IBIAS
VCC
a dc component equal to VCC and an ac component with
single-ended, peak-to-peak amplitude of IMOD × 25 Ω. This is
ADN2525
L
L
the case even if the load impedance is less than 50 Ω differential,
IMODP
Z 0 = 25 ?
C
Z 0 = 25 ?
because the transmission line characteristic impedance sets the
peak-to-peak amplitude. For proper operation of the output stage,
the voltages at the IMODP and IMODN pins must be between
TOSA
the compliance voltage specifications for this pin over supply,
MSET
IMODN
Z 0 = 25 ?
C
Z 0 = 25 ?
temperature, and modulation current range, as shown in Figure 30.
See the Applications Information section for examples of
V MSET
GND
L
L
headroom calculations.
VCC VCC
Figure 28. Recommended Configuration for the MSET, IMODP, and IMODN Pins
Rev. A | Page 11 of 16
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