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参数资料
| 型号： | ADN8830ACPZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/22页 |
| 文件大小： | 0K |
| 描述： | IC THERMO COOLER CNTRLR 32-LFCSP |
| 标准包装： | 1 |
| 应用： | 热电冷却器 |
| 电流 - 电源： | 8mA |
| 电源电压： | 3.3 V ~ 5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-VQ（5x5） |
| 包装： | 剪切带 (CT) |
| 其它名称： | ADN8830ACPZ-REELCT |
ADN8830–SPECIFICATIONS (@ configuration as shown in Figure 1, unless otherwise noted.) using typical application
V DD = 3.3 V to 5.0 V, V GND = 0 V, T A = 25 C, T SET = 25 C,
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
TEMPERATURE STABILITY
Long-Term Stability
Using 10 k Ω thermistor with
= –4.4% at 25 ° C
0.01
° C
PWM OUTPUT DRIVERS
Output Transition Time
Nonoverlapping Clock Delay
Output Resistance
t R , t F
R O (N1, P1)
C L = 3,300 pF
I L = 50 mA
50
20
65
6
ns
ns
Ω
Output Voltage Swing
Output Voltage Ripple
Output Current Ripple
OUT A
OUT A
I TEC
V LIM = 0 V
f CLK = 1 MHz
f CLK = 1 MHz
0
0.2
0.2
V DD
V
%
%
LINEAR OUTPUT AMPLIFIER
Output Resistance
Output Voltage Swing
R O, P2
R O, N2
OUT B
I OUT = 2 mA
I OUT = 2 mA
0
85
178
V DD
Ω
Ω
V
POWER SUPPLY
Power Supply Voltage
V DD
3.0
5.5
V
Power Supply Rejection Ratio
PSRR
V DD = 3.3 V to 5 V, V TEC = 0 V
–40 ° C ≤ T A ≤ +85 ° C
80
60
92
dB
dB
Supply Current
Shutdown Current
Soft-Start Charging Current
Undervoltage Lockout
I SY
I SD
I SS
V OLOCK
PWM not switching
–40 ° C ≤ T A ≤ +85 ° C
Pin 10 = 0 V
Low-to-high threshold
8
5
15
2.0
12
15
2.7
mA
mA
μ A
μ A
V
ERROR AMPLIFIER
Input Offset Voltage
Gain
Input Voltage Range
V OS
A V, IN
V CM
V CM = 1.5 V
0.2
50
20
250
2.0
μ V
V/V
V
Common-Mode Rejection Ratio
Open-Loop Input Impedance
Gain-Bandwidth Product
CMRR
R IN
GBW
0.2 V < V CM < 2.0 V
–40 ° C ≤ T A ≤ +85 ° C
58
55
68
1
2
dB
dB
G Ω
MHz
REFERENCE VOLTAGE
Reference Voltage
V REF
I REF < 2 mA
2.37
2.47
2.57
V
OSCILLATOR
Synchronization Range
Oscillator Frequency
f CLK
f CLK
Pin 25 connected to external clock
Pin 24 = V DD ; (R = 150 k Ω ;
200
800
1,000
1,000
1,250
kHz
kHz
Pin 25 = GND)
LOGIC CONTROL *
Logic Low Input Threshold
Logic High Input Threshold
Logic Low Output Level
Logic High Output Threshold
* Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 μ A).
Specifications subject to change without notice.
–2 –
3
V DD – 0.2
0.2
0.2
V
V
V
V
REV. D
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