参数资料
型号: ADP1048-600-EVALZ
厂商: Analog Devices Inc
文件页数: 58/84页
文件大小: 0K
描述: BOARD EVAL ADP1048-600
标准包装: 1
主要目的: 电源管理,功率因数校正
已用 IC / 零件: ADP1048
主要属性: 600W,385V 输出,85~265VAC 输入
已供物品:
ADP1047/ADP1048
CS_FAST_OCP_RESPONSE REGISTER
This register instructs the device on actions to take due to a fast overcurrent protection condition.
Table 62. Register 0xFE00—CS_FAST_OCP_RESPONSE
Data Sheet
Bits
[7:6]
Bit Name
Response
R/W
R/W
Description
These bits determine the device response to a fast overcurrent protection condition.
Bit 7
Bit 6
Response
0
0
Ignore (still terminate the PWM pulse).
0
1
Allow the number of switching cycles specified in Bits[5:4], then shut down and
soft start (use the soft start delay time specified in Register 0x5C, Bits[2:0]).
1
1
0
1
Allow the number of switching cycles specified in Bits[5:4] (terminating the PWM
pulse each time), then shut down and wait for the PSON signal to soft start.
Disable the PWM output after the number of switching cycles specified in Bits[5:4]
and wait for the flag to be cleared.
[5:4]
N-time
R/W
These bits determine the number of switching cycles allowed before the device disables the PWM
output after a fast overcurrent condition is detected.
Bit 5
0
0
1
1
Bit 4
0
1
0
1
Number of Switching Cycles
1
2
4
8
[3:0]
RSVD
R
Reserved.
OVP_FAST_OVP_RESPONSE REGISTER
This register instructs the device on actions to take due to a fast overvoltage fault condition.
Table 63. Register 0xFE01—OVP_FAST_OVP_RESPONSE
Bits
[7:6]
[5:0]
Bit Name
Response
RSVD
R/W
R/W
R
Description
These bits determine the device response to a fast overvoltage condition.
Bit 7
Bit 6
Response
0
0
Ignore (do nothing; PWM continues).
0
1
Shut down and soft start.
1
0
Shut down immediately and wait for the PSON signal.
1
1
Disable the PWM output until the unlatched flag is cleared.
Reserved.
OLP_RESPONSE REGISTER
This register instructs the device on actions to take due to an open-loop fault condition.
Table 64. Register 0xFE02—OLP_RESPONSE
Bits
[7:6]
[5:0]
Bit Name
Response
RSVD
R/W
R/W
R
Description
These bits determine the device response to an open-loop fault condition.
Bit 7
Bit 6
Response
0
0
Ignore (do nothing; PWM continues).
0
1
Shut down and soft start.
1
0
Shut down immediately and wait for the PSON signal.
1
1
Disable the PWM output until the unlatched flag is cleared.
Reserved.
Rev. 0 | Page 58 of 84
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