参数资料
型号: ADP1048-600-EVALZ
厂商: Analog Devices Inc
文件页数: 75/84页
文件大小: 0K
描述: BOARD EVAL ADP1048-600
标准包装: 1
主要目的: 电源管理,功率因数校正
已用 IC / 零件: ADP1048
主要属性: 600W,385V 输出,85~265VAC 输入
已供物品:
Data Sheet
VAC ADC GAIN TRIM REGISTER
This register must be unlocked for write access; see Table 61.
Table 125. Register 0xFE40—VAC ADC Gain Trim
ADP1047/ADP1048
Bits
7
Bit Name
Gain polarity
R/W
R/W
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
[6:0]
VAC ADC gain trim
R/W
This value calibrates the VAC voltage sense gain.
VFB ADC GAIN TRIM REGISTER
This register must be unlocked for write access; see Table 61.
Table 126. Register 0xFE41—VFB ADC Gain Trim
Bits
7
Bit Name
Gain polarity
R/W
R/W
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
[6:0]
VFB ADC gain trim
R/W
This value calibrates the output voltage sense gain.
CS ADC GAIN TRIM FOR 500 mV RANGE REGISTER
This register must be unlocked for write access; see Table 61.
Table 127. Register 0xFE42—CS ADC Gain Trim for 500 mV Range
Bits
7
Bit Name
Gain polarity
R/W
R/W
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
[6:0]
CS ADC gain trim
R/W
This value calibrates the CS current sense gain.
IBAL GAIN REGISTER ( ADP1048 ONLY)
Table 128. Register 0xFE43—IBAL Gain ( ADP1048 Only)
Bits
7
Bit Name
IBAL enable
R/W
R/W
Description
1 = enable current balancing.
0 = disable current balancing and reset the IBAL integrator.
[6:0]
IBAL gain
R/W
The gain can be set from 0 to 127.
SMART VOUT LOW POWER THRESHOLD (P1) REGISTER
Table 129. Register 0xFE44—Smart VOUT Low Power Threshold (P1)
Bits
[15:13]
[12:0]
Bit Name
RSVD
P1
R/W
R
R/W
Description
Reserved.
These bits set the threshold value for low power mode operation when the smart output
voltage function is enabled. When the input power is lower than this value, the output voltage
is VOL1 for low line input and VOH1 for high line input.
SMART VOUT HIGH POWER THRESHOLD (P2) REGISTER
Table 130. Register 0xFE45—Smart VOUT High Power Threshold (P2)
Bits
[15:13]
[12:0]
Bit Name
RSVD
P2
R/W
R
R/W
Description
Reserved.
These bits set the threshold value for high power mode operation when the smart output
voltage function is enabled. When the input power is higher than this value, the output
voltage is VOL2 for low line input and VOH2 for high line input.
Rev. 0 | Page 75 of 84
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