参数资料
型号: ADP1740ACPZ-1.1-R7
厂商: Analog Devices Inc
文件页数: 4/20页
文件大小: 0K
描述: IC REG LDO 1.1V 2A 16LFCSP
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 1.1V
输入电压: 1.6 V ~ 3.6 V
稳压器数量: 1
电流 - 输出: 2A(最小值)
电流 - 限制(最小): 2.4A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-VQ EP(4x4)
包装: 标准包装
产品目录页面: 794 (CN2011-ZH PDF)
其它名称: ADP1740ACPZ-1.1-R7DKR
ADP1740/ADP1741
Data Sheet
Parameter
SENSE INPUT BIAS CURRENT
Symbol
SNS I-BIAS
Test Conditions/Comments
1.6 V ≤ V IN ≤ 3.6 V
Min
Typ
10
Max
Unit
μA
(ADP1740)
OUTPUT NOISE
POWER SUPPLY REJECTION RATIO
OUT NOISE
PSRR
10 Hz to 100 kHz, V OUT = 0.75 V
10 Hz to 100 kHz, V OUT = 2.5 V
V IN = V OUT + 1 V, I OUT = 10 mA
1 kHz, V OUT = 0.75 V
1 kHz, V OUT = 2.5 V
10 kHz, V OUT = 0.75 V
10 kHz, V OUT = 2.5 V
100 kHz, V OUT = 0.75 V
100 kHz, V OUT = 2.5 V
23
65
65
56
65
56
54
51
μV rms
μV rms
dB
dB
dB
dB
dB
dB
1
2
3
4
5
6
Minimum output load current is 500 μA.
Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of the resistors used.
Based on an endpoint calculation using 10 mA and 2 A loads. See Figure 6 for typical load regulation performance.
Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only to output voltages
above 1.6 V.
Start-up time is defined as the time between the rising edge of EN to V OUT being at 95% of its nominal value.
Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE 1
CAPACITOR ESR
Symbol
C MIN
R ESR
Test Conditions/Comments
T A = –40°C to +125°C
T A = –40°C to +125°C
Min
3.3
0.001
Typ
Max
0.1
Unit
μF
?
1
The minimum input and output capacitance should be greater than 3.3 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during capacitor selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with this LDO.
Rev. F | Page 4 of 20
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