参数资料
型号: ADP1829ACPZ-R7
厂商: Analog Devices Inc
文件页数: 13/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32LFCSP
标准包装: 1
PWM 型: 电压模式
输出数: 2
频率 - 最大: 720kHz
占空比: 93%
电源电压: 3 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
包装: 标准包装
产品目录页面: 791 (CN2011-ZH PDF)
配用: ADP1829-EVALZ-ND - BOARD EVALUATION ADP1829
其它名称: ADP1829ACPZ-R7DKR

Data Sheet
THEORY OF OPERATION
The ADP1829 is a dual, synchronous, PWM buck controller
capable of generating output voltages down to 0.6 V and output
currents in the tens of amps. The switching of the regulators is
interleaved for reduced current ripple. It is ideal for a wide
range of applications, such as DSP and processor core I/O
supplies, general-purpose power in telecommunications,
medical imaging, gaming, PCs, set-top boxes, and industrial
controls. The ADP1829 controller operates directly from 3.0 V
to 20 V, and the power stage input voltage range is 1 V to 24 V,
which applies directly to the drain of the high-side external
power MOSFET. It includes fully integrated MOSFET gate
drivers and a linear regulator for internal and gate drive bias.
The ADP1829 operates at a fixed 300 kHz or 600 kHz switching
frequency. The ADP1829 can also be synchronized to an
external clock to switch at up to 1 MHz per channel. The
ADP1829 includes soft start to prevent inrush current during
startup, as well as a unique adjustable lossless current limit.
The ADP1829 offers flexible tracking for startup and shutdown
sequencing. It is specified over the ?40 ° C to +85 ° C temperature
range and is available in a space-saving, 5 mm × 5 mm,
32-lead LFCSP.
INPUT POWER
The ADP1829 is powered from the IN pin up to 20 V. The
internal low dropout linear regulator, VREG, regulates the IN
voltage down to 5 V. The control circuits, gate drivers, and
external boost capacitors operate from the LDO output. Tie the
PV pin to VREG and bypass VREG with a 1 μ F or greater
capacitor.
The ADP1829 phase shifts the switching of the two step-down
converters by 180 ° , thereby reducing the input ripple current.
This reduces the size and cost of the input capacitors. The input
voltage should be bypassed with a capacitor close to the high-
side switch MOSFETs (see the Selecting the Input Capacitor
section). In addition, a minimum 0.1 μF ceramic capacitor
should be placed as close as possible to the IN pin.
The VREG output is sensed by the undervoltage lockout
(UVLO) circuit to be certain that enough voltage headroom
is available to run the controllers and gate drivers. As VREG
rises above about 2.7 V, the controllers are enabled. The IN
voltage is not directly monitored by UVLO. If the IN voltage is
insufficient to allow VREG to be above the UVLO threshold,
the controllers are disabled but the LDO continues to operate.
The LDO is enabled whenever either EN1 or EN2 is high, even
if VREG is below the UVLO threshold.
If the desired input voltage is between 3.0 V and 5.5 V, connect
the IN directly to the VREG and PV pins, and drive LDOSD
high to disable the internal regulator. The ADP1829 requires
that the voltage at VREG and PV be limited to no more than
ADP1829
and it should otherwise be grounded or left open. LDOSD has
an internal 100 kΩ pull-down resistor.
While IN is limited to 20 V, the switching stage can run from up
to 24 V and the BST pins can go to 30 V to support the gate drive.
This can provide an advantage, for example, in the case of high
frequency operation from a high input voltage. Dissipation on the
ADP1829 can be limited by running IN from a low voltage rail
while operating the switches from the high voltage rail.
START-UP LOGIC
The ADP1829 features independent enable inputs for each
channel. Drive EN1 or EN2 high to enable their respective
controllers. The LDO starts when either channel is enabled.
When both controllers are disabled, the LDO is disabled and
the IN quiescent current drops to about 10 μA. For automatic
startup, connect EN1 and/or EN2 to IN. The enable pins are
20 V compliant, but they sink current through an internal
100 kΩ resistor once the EN pin voltage exceeds about 5 V.
INTERNAL LINEAR REGULATOR
The internal linear regulator, VREG, is low dropout, meaning it
can regulate its output voltage close to the input voltage. It
powers up the internal control and provides bias for the gate
drivers. It is guaranteed to have more than 100 mA of output
current capability, which is sufficient to handle the gate drive
requirements of typical logic threshold MOSFETs driven at up
to 1 MHz. Bypass VREG with a 1 μ F or greater capacitor.
Because the LDO supplies the gate drive current, the output of
VREG is subjected to sharp transient currents as the drivers
switch and the boost capacitors recharge during each switching
cycle. The LDO has been optimized to handle these transients
without overload faults. Due to the gate drive loading, using the
VREG output for other auxiliary system loads is not
recommended.
The LDO includes a current limit well above the expected
maximum gate drive load. This current limit also includes a
short-circuit foldback to further limit the VREG current in the
event of a fault.
OSCILLATOR AND SYNCHRONIZATION
The ADP1829 internal oscillator can be set to either 300 kHz or
600 kHz. Drive the FREQ pin low for 300 kHz; drive it high for
600 kHz. The oscillator generates a start clock for each
switching phase and also generates the internal ramp voltages
for the PWM modulation.
The SYNC input is used to synchronize the converter switching
frequency to an external signal. The SYNC input should be
driven with twice the desired switching frequency because the
SYNC input is divided by 2 and the resulting phases are used to
clock the two channels alternately.
5.5 V. This is the only application where the LDOSD pin is used,
Rev. C | Page 13 of 28
相关PDF资料
PDF描述
ADP1850ACPZ-R7 IC REG CTRLR BUCK PWM CM 32LFCSP
ADP1864AUJZ-R7 IC REG CTRLR BUCK PWM TSOT23-6
ADP1871ACPZ-0.6-R7 IC REG CTRLR BUCK PWM CM 10LFCSP
ADP1873ARMZ-0.3-R7 IC REG CTRLR BUCK PWM CM 10-MSOP
ADP1875ARQZ-0.3-R7 IC REG CTRLR BUCK PWM CM 16-QSOP
相关代理商/技术参数
参数描述
ADP1829-BL1-EVZ 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1829 - Boxed Product (Development Kits)
ADP1829-BL2-EVZ 制造商:Analog Devices 功能描述:Evaluation Board For Dual Interleaved Step-Down DC-To-DC Controller With Tracking 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1829 - Boxed Product (Development Kits)
ADP1829-EVALZ 功能描述:BOARD EVALUATION ADP1829 RoHS:是 类别:编程器,开发系统 >> 评估板 - DC/DC 与 AC/DC(离线)SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC,步升 输出及类型:1,非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969
ADP1850 制造商:AD 制造商全称:Analog Devices 功能描述:Wide Range Input, Dual/Two-Phase, DC-to-DC Synchronous Buck Controller
ADP1850ACPZ 制造商:Analog Devices 功能描述:IC BUCK CNTRL SYNC 2PH 32LFCSP