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参数资料
| 型号： | ADP1829ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32LFCSP |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 720kHz |
| 占空比： | 93% |
| 电源电压： | 3 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 包装： | 标准包装 |
| 产品目录页面： | 791 (CN2011-ZH PDF) |
| 配用： | ADP1829-EVALZ-ND - BOARD EVALUATION ADP1829 |
| 其它名称： | ADP1829ACPZ-R7DKR |
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ADP1829
Data Sheet
The rest of the system gain is needed to reach 0 dB at crossover.
The total gain of the system, therefore, is given by
GAIN
LC FILTER BODE PLOT
PHASE CONTRIBUTION AT CROSSOVER
OF VARIOUS ESR ZERO CORNERS
A T = A MOD + A FILTER + A COMP
where:
(26)
0dB
f LC f ESR1 f ESR2 f ESR3 f CO
–40dB/dec
f SW
FREQUENCY
A MOD is the gain of the PWM modulator.
A FILTER is the gain of the LC filter including the effects of
the ESR zero.
A COMP is the gain of the compensated error amplifier.
Additionally, the phase of the system must be brought back up
to guarantee stability. Note from the bode plot of the filter that
the LC contributes ?180° of phase shift. Additionally, because
the error amplifier is an integrator at low frequency, it contrib-
utes an initial ?90°. Therefore, before adding compensation or
accounting for the ESR zero, the system is already down ?270°.
To avoid loop inversion at crossover, or ?180° phase shift, a
good initial practical design is to require a phase margin of 60°,
PHASE
0°
–20dB/dec
which is therefore an overall phase loss of ?120° from the initial
low frequency dc phase. The goal of the compensation is to
boost the phase back up from ?270° to ?120° at crossover.
The two common compensation schemes used are sometimes
referred to as Type II or Type III compensation, depending on
whether the compensation design includes two or three poles.
–90°
–180°
Φ 1
Φ 2
Φ 3
(Dominant-pole compensations, or single-pole compensation,
is referred to as Type I compensation, but unfortunately, it is not
very useful for dealing successfully with switching regulators.)
Figure 27. LC Filter Bode Plot
The following equations were used for the calculation of the
2 ? R Z
If the zero produced by the ESR of the output capacitor provides
sufficient phase boost at crossover, Type II compensation is
adequate. If the phase boost produced by the ESR of the output
capacitor is not sufficient, another zero is added to the
compensation network, and thus, Type III is used.
In Figure 27, the location of the ESR zero corner frequency
gives significantly different net phase at the crossover frequency.
Use the following guidelines for selecting between Type II and
Type III compensators:
f Z1 ?
f Z2 ?
f P1 ?
1
2 ? R Z C I
1
2 ? C FF ( R TOP ? R FF )
1
C I C HF
C I ? C HF
(27)
(28)
(29)
If f ESRZ ?
f CO
2
, use Type II compensation.
f P2 ?
1
2 ? R FF C FF
(30)
If f ESRZ ?
f CO
2
, use Type III compensation.
where:
f Z1 is the zero produced in the Type II compensation.
f Z2 is the zero produced in the Type III compensation.
f P1 is the pole produced in the Type II compensation.
f P2 in the pole produced in the Type III compensation.
Rev. C | Page 20 of 28
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1829-BL1-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1829 - Boxed Product (Development Kits) |
| ADP1829-BL2-EVZ | 制造商:Analog Devices 功能描述:Evaluation Board For Dual Interleaved Step-Down DC-To-DC Controller With Tracking 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1829 - Boxed Product (Development Kits) |
| ADP1829-EVALZ | 功能描述:BOARD EVALUATION ADP1829 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1850 | 制造商:AD 制造商全称:Analog Devices 功能描述:Wide Range Input, Dual/Two-Phase, DC-to-DC Synchronous Buck Controller |
| ADP1850ACPZ | 制造商:Analog Devices 功能描述:IC BUCK CNTRL SYNC 2PH 32LFCSP |
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