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| 型号： | ADP1874-0.6-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADP1874 |
| 标准包装： | 1 |
| 系列： | * |
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Data Sheet
THEORY OF OPERATION
The ADP1874 / ADP1875 are versatile current mode, synchronous
step-down controllers that provide superior transient response,
optimal stability, and current limit protection by using a constant
on-time, pseudo-fixed frequency with a programmable current-
sense gain, current-control scheme. In addition, these devices offer
optimum performance at low duty cycles by using a valley, current
ADP1874/ADP1875
PRECISION ENABLE CIRCUITRY
The ADP1874 / ADP1875 have precision enable circuitry. The
precision enable threshold is 630 mV with 30 mV of hysteresis
(see Figure 65). Connecting the EN pin to GND disables the
to approximately 140 μA.
VREG
to drive all N-channel power stages to regulate output voltages
to as low as 0.6 V.
STARTUP
The ADP1874 / ADP1875 have an internal regulator (VREG) for
biasing and supplying power for the integrated MOSFET drivers.
10k?
EN
PRECISION
ENABLE COMP.
TO ENABLE
ALL BLOCKS
630mV
A bypass capacitor should be located directly across the VREG
(Pin 7) and PGND (Pin 13) pins. Included in the power-up
sequence is the biasing of the current-sense amplifier, the current-
Circuit section), the soft start circuit, and the error amplifier.
Figure 65. Connecting EN Pin to VREG via a Pull-Up Resistor to Enable the
COMP
The current-sense blocks provide valley current information
(see the Programming Resistor (RES) Detect Circuit section)
and are a variable of the compensation equation for loop stability
(see the Compensation Network section). The valley current
information is extracted by forcing a voltage across the RES and
PGND pins, which generates a current depending on the resistor
value across RES and PGND. The current through the resistor is
used to set the current-sense amplifier gain. This process takes
approximately 800 μs, after which the drive signal pulses appear
at the DRVL and DRVH pins synchronously, and the output
2.4V
1.0V
500mV
MAXIMUM CURRENT (UPPER CLAMP)
ZERO CURRENT
USABLE RANGE ONLY AFTER SOFT START
PERIOD IF CONTUNUOUS CONDUCTION
MODE OF OPERATION IS SELECTED.
LOWER CLAMP
voltage begins to rise in a controlled manner through the soft
start sequence.
The rise time of the output voltage is determined by the soft
start and error amplifier blocks (see the Soft Start section). At
the beginning of a soft start, the error amplifier charges the
external compensation capacitor, causing the COMP pin to
begin to rise (see Figure 66). Tying the VREG pin to the EN pin
via a pull-up resistor causes the voltage at this pin to rise above the
SOFT START
The ADP1874 employs externally programmable, soft start
0V
Figure 66. COMP Voltage Range
UNDERVOLTAGE LOCKOUT
The undervoltage lockout (UVLO) feature prevents the part
from operating both the upper side and lower side MOSFETs at
extremely low or undefined input voltage (VIN) ranges. Operation
at an undefined bias voltage may result in the incorrect propagation
of signals to the high-side power switches. This, in turn, results
in invalid output behavior that can cause damage to the output
devices, ultimately destroying the device tied at the output. The
UVLO level is set at 2.65 V (nominal).
circuitry that charges up a capacitor tied to the SS pin to GND.
This prevents input in-rush current through the external MOSFET
from the input supply (V IN ). The output tracks the ramping voltage
by producing PWM output pulses to the upper side MOSFET.
The purpose is to limit the in-rush current from the high
voltage input supply (V IN ) to the output (V OUT ).
Rev. A | Page 19 of 44
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1874-1.0-EVALZ | 功能描述:BOARD EVAL FOR ADP1874 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1874ARQZ-0.3-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR |
| ADP1874ARQZ-0.6-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1874ARQZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1875 | 制造商:AD 制造商全称:Analog Devices 功能描述:Synchronous Buck Controller with Constant On-Time and Valley Current Mode |
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