参数资料
型号: ADP1874-0.6-EVALZ
厂商: Analog Devices Inc
文件页数: 25/44页
文件大小: 0K
描述: BOARD EVAL FOR ADP1874
标准包装: 1
系列: *
Data Sheet
OUTPUT OVERVOLTAGE
PGOOD DEASSERT
ADP1874/ADP1875
FB
690mV
640mV
HYSTERESIS (50mV)
PGOOD
REASSERT
600mV
530mV
PGOOD
0V
SOFT-START
ASSERTION
AT POWER-UP
PGOOD
DEASSERTION
AT POWER DOWN
VEXT
PGOOD
0V
t PGD
t PGD
t PGD
t PGD
Figure 80. Power Good Timing Diagram, t PGD = 12 μs (Diagram May Look Disproportionate for Illustration Purposes.)
SLAVE
MASTER
VREG 10k?
EN
PGOOD
R PGD
V EXT
VREG 10k?
EN
1.2V V OUT2 (SLAVE)
1.8V V OUT1 (MASTER)
R TOP2
1k?
R BOT2
1k?
FB SS
GND TRACK
PGND
C SS
R TRK2
0.9V 1 k?
R TRK1
1k?
R TOP1
R BOT1
FB
GND
PGND
Figure 81. Coincident Tracking Circuit Implementation
SLAVE
MASTER
VREG 10k?
EN
PGOOD
R PGD
V EXT
VREG 10k?
EN
1.2V V OUT2 (SLAVE)
2.5V V OUT1 (MASTER)
R TOP2
1k?
R BOT2
1k?
FB SS
GND TRACK
PGND
C SS
R TRK2
1.7V 500?
R TRK1
1k?
R TOP1
R BOT1
FB
GND
PGND
Figure 82. Ratiometric Tracking Circuit Implementation
VOLTAGE TRACKING
The ADP1874 / ADP1875 feature a voltage-tracking function that
facilitates proper power-up sequencing in applications that require
tracking a master voltage. In this manner, the user is free to
impose a master voltage that typically comes with a selectable
or programmable ramp rate on slave or secondary power rails.
To impose any voltage tracking relationship, the master voltage
rise time must be longer than the slave voltage soft start period.
This is particularly important in applications such as I/O voltage
sequencing and core voltage applications where specific power
sequencing is required.
Tracking is made possible by four inputs to the error amplifier,
three of which are input pins to the IC. The TRACK and SS pins
are positive inputs, and the FB pin provides the negative feedback
from the output voltage via the divider network. The fourth input
to the amplifier is the reference voltage of 0.6 V. The negative
feedback pin (FB pin) regulates the output voltage to the lowest
of the three positive inputs (TRACK, SS, and 0.6 V reference).
In all tracking configurations, the slave output can be set to as
Coincident and ratiometric tracking are two possible tracking
configuration options offered by the ADP1874 / ADP1875 .
Coincident tracking is the most commonly used tracking
technique. It is primarily used in core and I/O sequencing
applications. The ramp rate of the master voltage is fully
imposed onto the ramp rate of the slave output voltage until it
has reached its regulation setpoint. Connecting the TRACK pin,
by differentially tapping onto the master voltage via a resistive
divider of similar ratio to the slave feedback divider network,
is depicted in Figure 83.
MASTER VOLTAGE
SLAVE VOLTAGE
TIME (ms)
Figure 83. Coincident Tracking: Master Voltage—Slave Voltage Tracking
Relationship
low as 0.6 V for a given operating condition. The master voltage
must have a longer rise time than the slaves programmed soft start
period; otherwise, the tracking relationship will not be observed
at the slave output.
Rev. A | Page 25 of 44
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