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| 型号： | ADS62C17IRGCR |
| 厂商： | Texas Instruments |
| 文件页数： | 23/68页 |
| 文件大小： | 0K |
| 描述： | IC ADC 11BIT SRL/PAR 200M 64VQFN |
| 标准包装： | 2,000 |
| 位数： | 11 |
| 采样率（每秒）： | 200M |
| 数据接口： | 串行，并联 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 1.1W |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘 |
| 供应商设备封装： | 64-VQFN 裸露焊盘（9x9） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个差分，单极 |
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THERMAL CHARACTERISTICS
(1)
ABSOLUTE MAXIMUM RATINGS
(1)
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TYP
UNIT
RθJA
(2)
Soldered thermal pad, no airflow
22
Soldered thermal pad, 200 LFM
15
° C/W
RθJT
(3)
Bottom of package (thermal pad)
0.57
(1)
With a JEDEC standard high K board and 5x5 via array. See Exposed Pad in the Application Information.
(2)
RθJA is the thermal resistance from the junction to ambient.
(3)
RθJT is the thermal resistance from the junction to the thermal pads.
VALUE
UNIT
Supply voltage range AVDD
-0.3 to 3.9
V
Supply voltage range DRVDD
–0.3 to 2.2
Voltage between AGND and DRGND
–0.3 to 0.3
Voltage between AVDD to DRVDD (when AVDD leads DRVDD)
0 to 3.3
V
Voltage between DRVDD to AVDD (when DRVDD leads AVDD)
–1.5 to 1.8
Voltage applied to external pin, VCM (in external refersnce mode)
–0.3 to 2.0
–0.3V to minimum
Voltage applied to analog input pins – INP_A, INM_A, INP_B, INM_B
V
(3.6, AVDD + 0.3V)
Voltage applied to input pins – CLKP, CLKM(2), RESET, SCLK, SDATA, SEN, CTRL1,
–0.3V to ADD + 0.3V
CTRL2, CTRL3
TA
Operating free-air temperature range
–40 to 85
°C
TJ
Operating junction temperature range
125
°C
Tstg
Storage temperature range
–54 to 150
°C
ESD, human body model
2
kV
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2)
When AVDD is turned off, it is recommended to switch off the input clock (or ensure the voltage on CLKP, CLKM is < |0.3V|. This
prevents the ESD protection diodes at the clock input pins from turning on.
Copyright 2009, Texas Instruments Incorporated
3
Product Folder Link(s): ADS62C17
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