参数资料
型号: ADS62C17IRGCR
厂商: Texas Instruments
文件页数: 8/68页
文件大小: 0K
描述: IC ADC 11BIT SRL/PAR 200M 64VQFN
标准包装: 2,000
位数: 11
采样率(每秒): 200M
数据接口: 串行,并联
转换器数目: 2
功率耗散(最大): 1.1W
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-VQFN 裸露焊盘(9x9)
包装: 带卷 (TR)
输入数目和类型: 2 个差分,单极
0
0
1
REGISTER ADDRESS (A7:A0) = 0x00
REGISTER DATA (D7:D0) = 0x01
SDATA
SCLK
SEN
A)Enableserialreadout(<SERIAL READOUT>=1)
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SDATA
SCLK
SEN
SDOUT
B) Read contents of register 0x3F.
Thisregisterhasbeeninitializedwith0x04
(device is put in global power down mode)
REGISTER ADDRESS (A7:A0) = 0x3F
REGISTER DATA (D7:D0 ) = XX (don’t care)
SDOUT
1
0
Pin SDOUT functions as serial readout (<SERIAL READOUT> = 1)
0
Pin SDOUT is NOT in high-impedance state; it is forced low by the device (<SERIAL READOUT> = 0)
RESET TIMING (WHEN USING SERIAL INTERFACE ONLY)
SLAS631A – APRIL 2009 – REVISED JULY 2009 ............................................................................................................................................................. www.ti.com
Figure 8. Serial Readout
Typical values at 25°C, min and max values across the full temperature range TMIN = –40°C to TMAX = 85°C, unless otherwise
noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
t1
Power-on delay
Delay from power-up of AVDD and DRVDD to RESET pulse active
1
ns
t2
Reset pulse width
Pulse width of active RESET signal
10
ns
1(1)
s
t3
Register write delay
Delay from RESET disable to SEN active
100
ns
(1)
The reset pulse is needed only when using the serial interface configuration. If the pulse width is greater than 1usec, the device could
enter the parallel configuration mode briefly and then return back to serial interface mode.
16
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62C17
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