- 您现在的位置：买卖IC网 > PDF目录19380 > ADSP-21366BSWZ-1AA (Analog Devices Inc)IC DSP 32BIT 333MHZ EPAD 144LQFP PDF资料下载
参数资料
| 型号： | ADSP-21366BSWZ-1AA |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/60页 |
| 文件大小： | 0K |
| 描述： | IC DSP 32BIT 333MHZ EPAD 144LQFP |
| 产品培训模块： | SHARC Processor Overview |
| 标准包装： | 1 |
| 系列： | SHARC® |
| 类型： | 浮点 |
| 接口： | DAI，SPI |
| 时钟速率： | 333MHz |
| 非易失内存： | ROM（512 kB） |
| 芯片上RAM： | 384kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 1.20V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP 裸露焊盘 |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
PIN FUNCTION DESCRIPTIONS
The processor’s pin definitions are listed below. Inputs identi-
fied as synchronous (S) must meet timing requirements with
respect to CLKIN (or with respect to TCK for TMS and TDI).
Inputs identified as asynchronous (A) can be asserted asynchro-
nously to CLKIN (or to TCK for TRST). Tie or pull unused
inputs to V DDEXT or GND, except for the following:
DAI_Px, SPICLK, MISO, MOSI, EMU, TMS, TRST, TDI, and
AD15–0. Note : These pins have pull-up resistors.
Table 6. Pin Descriptions
State During and
Pin
AD15–0
Type
I/O/T
(pu)
After Reset
Three-state with
pull-up enabled
Function
Parallel Port Address/Data. The ADSP-2136x parallel port and its corresponding DMA
unit output addresses and data for peripherals on these multiplexed pins. The multiplex
state is determined by the ALE pin. The parallel port can operate in either 8-bit or 16-bit
mode. Each AD pin has a 22.5 kΩ internal pull-up resistor. For details about the AD pin
operation, refer to the ADSP-2136x SHARC Processor Hardware Reference .
For 8-bit mode: ALE is automatically asserted whenever a change occurs in the upper 16
external address bits, ADDR23–8; ALE is used in conjunction with an external latch to
retain the values of the ADDR23–8.
For detailed information on I/O operations and pin multiplexing, refer to the ADSP-2136x
SHARC Processor Hardware Reference .
RD
O
(pu)
Three-state, driven
high 1
Parallel Port Read Enable. RD is asserted low whenever the processor reads 8-bit or 16-
bit data from an external memory device. When AD15–0 are flags, this pin remains
deasserted. RD has a 22.5 kΩ internal pull-up resistor.
WR
O
(pu)
Three-state, driven
high 1
Parallel Port Write Enable. WR is asserted low whenever the processor writes 8-bit or
16-bit data to an external memory device. When AD15–0 are flags, this pin remains
deasserted. WR has a 22.5 kΩ internal pull-up resistor.
ALE
O
(pd)
Three-state, driven
low 1
Parallel Port Address Latch Enable. ALE is asserted whenever the processor drives a
new address on the parallel port address pins. On reset, ALE is active high. However, it
can be reconfigured using software to be active low. When AD15–0 are flags, this pin
remains deasserted. ALE has a 20 kΩ internal pull-down resistor.
FLAG[0]/IRQ0/SPI
I/O
FLAG[0] INPUT
FLAG0/Interrupt Request0/SPI0 Slave Select.
FLG[0]
FLAG[1]/IRQ1/SPI
I/O
FLAG[1] INPUT
FLAG1/Interrupt Request1/SPI1 Slave Select.
FLG[1]
FLAG[2]/IRQ2/SPI
I/O
FLAG[2] INPUT
FLAG2/Interrupt Request 2/SPI2 Slave Select .
FLG[2]
FLAG[3]/TMREXP/
I/O
FLAG[3] INPUT
FLAG3/Timer Expired/SPI3 Slave Select.
SPIFLG[3]
DAI_P20–1
I/O/T
(pu)
Three-state with
programmable
pull-up
Digital Audio Interface Pins . These pins provide the physical interface to the SRU. The
SRU configuration registers define the combination of on-chip peripheral inputs or
outputs connected to the pin and to the pin’s output enable. The configuration registers
of these peripherals then determine the exact behavior of the pin. Any input or output
signal present in the SRU can be routed to any of these pins. The SRU provides the
connection from the serial ports, input data port, precision clock generators and timers,
sample rate converters and SPI to the DAI_P20–1 pins. These pins have internal 22.5 kΩ
pull-up resistors that are enabled on reset. These pull-ups can be disabled using the
DAI_PIN_PULLUP register.
The following symbols appear in the Type column of Table 6 : A = asynchronous, G = ground, I = input, O = output, P = power supply,
S = synchronous, ( A/D ) = active drive, ( O/D ) = open drain, and T = three-state, ( pd ) = pull-down resistor, ( pu ) = pull-up resistor.
Rev. J |
Page 11 of 60 |
July 2013
相关PDF资料 |
PDF描述 |
|---|---|
| RSM40DRMH-S288 | CONN EDGECARD 80POS .156 EXTEND |
| VE-21T-CW-F2 | CONVERTER MOD DC/DC 6.5V 100W |
| RS3-0512S/H2 | CONV DC/DC 3W 4.5-9VIN 12VOUT |
| EBC12DCSD | CONN EDGECARD 24POS DIP .100 SLD |
| RMM40DRMH-S288 | CONN EDGECARD 80POS .156 EXTEND |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-21366KBC-1AA | 功能描述:数字信号处理器和控制器 - DSP, DSC 333 MHz SHARC with on chipRom RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| ADSP-21366KBCZ1AA | 制造商:Analog Devices 功能描述:- Trays |
| ADSP-21366KBCZ-1AA | 功能描述:数字信号处理器和控制器 - DSP, DSC es3 MHz SHARC with on chipRom RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| ADSP-21366KSWZ-1AA | 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT/40-BIT 333MHZ 333MIPS 144LQFP EP - Trays 制造商:Analog Devices 功能描述:IC SHARC DSP 333MHZ SMD LQFP144 |
| ADSP-21366SBBC-ENG | 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processor |
发布紧急采购，3分钟左右您将得到回复。