参数资料
型号: ADSP-21366BSWZ-1AA
厂商: Analog Devices Inc
文件页数: 46/60页
文件大小: 0K
描述: IC DSP 32BIT 333MHZ EPAD 144LQFP
产品培训模块: SHARC Processor Overview
标准包装: 1
系列: SHARC®
类型: 浮点
接口: DAI,SPI
时钟速率: 333MHz
非易失内存: ROM(512 kB)
芯片上RAM: 384kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 144-LQFP 裸露焊盘
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
OUTPUT DRIVE CURRENTS
Figure 37 shows typical I-V characteristics for the output driv-
ers of the processor. The curves represent the current drive
capability of the output drivers as a function of output voltage.
40
CAPACITIVE LOADING
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see Figure 38 ). Figure 42 shows graphically
how output delays and holds vary with load capacitance. The
graphs of Figure 40 , Figure 41 , and Figure 42 may not be linear
outside the ranges shown for Typical Output Delay versus Load
Capacitance and Typical Output Rise Time (20% to 80%,
3 0
20
VOH
3 . 3 V, +25°C
3 .47V, - 45°C
V = Min) versus Load Capacitance.
12
10
3 .11V, +125°C
0
-10
10
8
y = 0.0467x + 1.6323
RISE
FALL
3 .11V, +125°C
-20
3 . 3 V, +25°C
6
- 3 0
VOL
-40
0
0.5
3 .47V, -45°C
1.0 1.5
2.0
2.5
3 .0
3 .5
4
y = 0.045x + 1.524
S WEEP (V DDEXT ) VOLTAGE (V)
Figure 37. ADSP-2136x Typical Drive
2
0
0
50
100
150
200
250
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
Table 12 on Page 20 through Table 41 on Page 45 . These include
output disable time, output enable time, and capacitive loading.
The timing specifications for the SHARC apply for the voltage
reference levels in Figure 38 .
Timing is measured on signals when they cross the 1.5 V level as
described in Figure 39 . All delays (in nanoseconds) are mea-
sured between the point that the first signal reaches 1.5 V and
12
10
LOAD CAPACITANCE (pF)
Figure 40. Typical Output Rise/Fall Time
(20% to 80%, V DDEXT = Max)
RI S E
the point that the second signal reaches 1.5 V.
8
y = 0.049x + 1.5105
FALL
TO
OUTPUT
PIN
30pF
V LOAD
6
y = 0.04 8 2x + 1.4604
4
Figure 38. Equivalent Device Loading for AC Measurements
2
(Includes All Fixtures)
0
0
50
100
150
200
250
INPUT
OR
1.5V
1.5V
LOAD CAPACITANCE (pF)
OUTPUT
Figure 41. Typical Output Rise/Fall Time
(20% to 80%, V DDEXT = Min)
Figure 39. Voltage Reference Levels for AC Measurements
Rev. J |
Page 46 of 60 |
July 2013
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