参数资料
型号: ADSP-BF532SBBC400
厂商: Analog Devices Inc
文件页数: 47/64页
文件大小: 0K
描述: IC DSP CTLR 16B 400MHZ 160CSPBGA
产品培训模块: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: SPI,SSP,UART
时钟速率: 400MHz
非易失内存: ROM(1 kB)
芯片上RAM: 84kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 160-LFBGA,CSPBGA
供应商设备封装: 160-CSPBGA(12x12)
包装: 托盘
配用: ADZS-BF533-EZLITE-ND - KIT W/BOARD EVAL FOR ADSP-BF533
ADSP-BF531 / ADSP-BF532 / ADSP-BF533
14
12
30
25
10
RISE TIME
20
RISE TIME
8
FALL TIME
15
FALL TIME
6
10
4
5
2
0
0
0
50
100 150
LOAD CAPACITANCE (pF)
200
250
0
50
100 150
LOAD CAPACITANCE (pF)
200
250
Figure 51. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Driver B at V DDEXT = 1.75 V
Figure 54. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Driver C at V DDEXT = 1.75 V
30
12
25
10
RISE TIME
8
RISE TIME
20
6
FALL TIME
15
FALL TIME
10
4
5
2
0
0
50
100 150
200
250
0
0
50
100 150
LOAD CAPACITANCE (pF)
200
250
LOAD CAPACITANCE (pF)
Figure 55. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Figure 52. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Driver B at V DDEXT = 2.25 V
20
Driver C at V DDEXT = 2.25 V
10
9
18
16
8
7
6
5
4
3
2
RISE TIME
FALL TIME
14
12
10
8
6
4
2
RISE TIME
FALL TIME
1
0
0
50
100 150
200
250
0
0
50
100 150
LOAD CAPACITANCE (pF)
200
250
LOAD CAPACITANCE (pF)
Figure 53. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Driver B at V DDEXT = 3.65 V
Figure 56. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Driver C at V DDEXT = 3.65 V
Rev. I
|
Page 47 of 64 |
August 2013
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