- 您现在的位置：买卖IC网 > PDF目录19388 > ADSP-BF534YBCZ-4B (Analog Devices Inc)IC DSP CTLR 16BIT 400MHZ 208-CSP PDF资料下载
参数资料
| 型号： | ADSP-BF534YBCZ-4B |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/68页 |
| 文件大小： | 0K |
| 描述： | IC DSP CTLR 16BIT 400MHZ 208-CSP |
| 产品培训模块： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 标准包装： | 1 |
| 系列： | Blackfin® |
| 类型： | 定点 |
| 接口： | CAN，SPI，SSP，TWI，UART |
| 时钟速率： | 400MHz |
| 非易失内存： | 外部 |
| 芯片上RAM： | 132kB |
| 电压 - 输入/输出： | 2.50V，3.30V |
| 电压 - 核心： | 1.20V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 208-LFBGA，CSPBGA |
| 供应商设备封装： | 208-CSPBGA |
| 包装： | 托盘 |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页
Rev. J
|
Page 11 of 68
|
February 2014
In conjunction with the general-purpose timer functions, auto-
baud detection is supported.
The capabilities of the UARTs are further extended with sup-
port for the infrared data association (IrDA
) serial infrared
physical layer link specification (SIR) protocol.
CONTROLLER AREA NETWORK (CAN)
The ADSP-BF534/ADSP-BF536/ADSP-BF537 processors offer
a CAN controller that is a communication controller imple-
menting the CAN 2.0B (active) protocol. This protocol is an
asynchronous communications protocol used in both industrial
and automotive control systems. The CAN protocol is well-
suited for control applications due to its capability to communi-
cate reliably over a network, since the protocol incorporates
CRC checking message error tracking, and fault node
confinement.
The CAN controller offers the following features:
32 mailboxes (eight receive only, eight transmit only, 16
configurable for receive or transmit).
Dedicated acceptance masks for each mailbox.
Additional data filtering on first two bytes.
Support for both the standard (11-bit) and extended
(29-bit) identifier (ID) message formats.
Support for remote frames.
Active or passive network support.
CAN wake-up from hibernation mode (lowest static power
consumption mode).
Interrupts, including: Tx complete, Rx complete, error,
global.
The electrical characteristics of each network connection are
very demanding so the CAN interface is typically divided into
two parts: a controller and a transceiver. This allows a single
controller to support different drivers and CAN networks. The
CAN module represents only the controller part of the interface.
The controller interface supports connection to 3.3 V high-
speed, fault-tolerant, single-wire transceivers.
TWI CONTROLLER INTERFACE
The ADSP-BF534/ADSP-BF536/ADSP-BF537 processors
include a 2-wire interface (TWI) module for providing a simple
exchange method of control data between multiple devices. The
TWI is compatible with the widely used I2C
bus standard. The
TWI module offers the capabilities of simultaneous master and
slave operation, support for both 7-bit addressing and multime-
dia data arbitration. The TWI interface utilizes two pins for
transferring clock (SCL) and data (SDA) and supports the
protocol at speeds up to 400 kbps. The TWI interface pins are
compatible with 5 V logic levels.
Additionally, the processor’s TWI module is fully compatible
with serial camera control bus (SCCB) functionality for easier
control of various CMOS camera sensor devices.
10/100 ETHERNET MAC
The ADSP-BF536 and ADSP-BF537 processors offer the capa-
bility to directly connect to a network by way of an embedded
fast Ethernet Media Access Controller (MAC) that supports
both 10-BaseT (10 Mbps) and 100-BaseT (100 Mbps) operation.
The 10/100 Ethernet MAC peripheral is fully compliant to the
IEEE 802.3-2002 standard, and it provides programmable fea-
tures designed to minimize supervision, bus use, or message
processing by the rest of the processor system.
Some standard features are
Support of MII and RMII protocols for external PHYs.
Full duplex and half duplex modes.
Data framing and encapsulation: generation and detection
of preamble, length padding, and FCS.
Media access management (in half-duplex operation): col-
lision and contention handling, including control of
retransmission of collision frames and of back-off timing.
Flow control (in full-duplex operation): generation and
detection of PAUSE frames.
Station management: generation of MDC/MDIO frames
for read-write access to PHY registers.
SCLK operating range down to 25 MHz (active and sleep
operating modes).
Internal loopback from Tx to Rx.
Some advanced features are
Buffered crystal output to external PHY for support of a
single crystal system.
Automatic checksum computation of IP header and IP
payload fields of Rx frames.
Independent 32-bit descriptor-driven Rx and Tx DMA
channels.
Frame status delivery to memory via DMA, including
frame completion semaphores, for efficient buffer queue
management in software.
Tx DMA support for separate descriptors for MAC header
and payload to eliminate buffer copy operations.
Convenient frame alignment modes support even 32-bit
alignment of encapsulated Rx or Tx IP packet data in mem-
ory after the 14-byte MAC header.
Programmable Ethernet event interrupt supports any com-
bination of
Any selected Rx or Tx frame status conditions.
PHY interrupt condition.
Wake-up frame detected.
Any selected MAC management counter(s) at
half-full.
DMA descriptor error.
47 MAC management statistics counters with selectable
clear-on-read behavior and programmable interrupts on
half maximum value.
相关PDF资料 |
PDF描述 |
|---|---|
| ADSP-21488BSWZ-3A | IC DSP 3MBIT 400MHZ 100LQFP |
| ADSP-BF544MBBCZ-5M | IC DSP 16BIT 533MHZ MDDR 400CBGA |
| SWS600L-5 | POWER SUPPLY 5V 120A SGL OUTPUT |
| ADSP-BF544BBCZ-5A | IC DSP 16BIT 533MHZ 400CSBGA |
| ADSP-21266SKSTZ-2D | IC DSP 32BIT 150MHZ 144-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-BF535PBB-200 | 功能描述:IC DSP CONTROLLER 16BIT 260BGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-BF535PBB-300 | 功能描述:IC DSP CONTROLLER 16BIT 260BGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-BF535PBBZ-200 | 功能描述:IC DSP CONTROLLER 16BIT 260-BGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSPBF535PKB300 | 制造商:Analog Devices 功能描述: |
| ADSP-BF535PKB-300 | 功能描述:IC DSP CONTROLLER 16BIT 260 BGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
发布紧急采购，3分钟左右您将得到回复。