参数资料
型号: ADUC7122BBCZ-RL
厂商: Analog Devices Inc
文件页数: 11/96页
文件大小: 0K
描述: PRECISION ANALOG MCU I.C
标准包装: 1
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 41.78MHz
连通性: I²C,SPI,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 126KB(63K x 16)
程序存储器类型: 闪存
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 13x12b,D/A 12x12b
振荡器型: 内部
工作温度: -10°C ~ 95°C
封装/外壳: 108-LFBGA,CSPBGA
包装: 标准包装
其它名称: ADUC7122BBCZ-RLDKR
ADuC7122
Rev. 0 | Page 19 of 96
TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity (INL)
The maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
LSB below the first code transition, and full scale, a point
LSB above the last code transition.
Differential Nonlinearity (DNL)
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (0000…000) to
(0000…001) from the ideal, that is, LSB.
Gain Error
The deviation of the last code transition from the ideal AIN
voltage (full scale 1.5 LSB) after the offset error has been
adjusted out.
Signal-to-(Noise + Distortion) Ratio
The measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels there are, the smaller
the quantization noise becomes.
The theoretical signal-to-(noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus, for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
The ratio of the rms sum of the harmonics to the fundamental.
DAC SPECIFICATIONS
Relative Accuracy
Otherwise known as endpoint linearity, relative accuracy is a
measure of the maximum deviation from a straight line passing
through the endpoints of the DAC transfer function. It is
measured after adjusting for zero error and full-scale error.
Voltage Output Settling Time
The amount of time it takes the output to settle to within a
1 LSB level for a full-scale input change.
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