Data Sheet
ADV3002
Rev. B | Page 15 of 28
EDID Replication with External EEPROM
T
he ADV3002 has dedicated pins to interface to an external
EDID EEPROM: EDID_SDA and EDID_SCL. In the default
configuration, after the first hot plug event or system power-up,
the internal I2C master in the ADV3002 copies the contents of the external EDID EEPROM into the on-chip SRAM. While the
EDID is being copied, the HPD signals for all four ports are held
low by th
e ADV3002. A flowchart of the start-up procedure is
shown i
n Figure 29. The entire start-up procedure takes less than
10 ms. The EDID replication feature can be disabled using the
EDID_ENABLE pin.
POWER-UP, RESET,
OR FIRST HOT PLUG
WAIT
FOR EDID POWER-UP
COPY EDID INFORMATION
TO ADV3002 SRAM
DETERMINE SPA
AND CHECKSUM
WAIT FOR EDID
REQUEST
RESPOND TO EDID
REQUEST
HPD ALL PORTS = LOW
HPD ALL PORTS = HIGH
<100s
<10ms
07905-
009
Figure 29. EDID Replication Start-Up Flowchart with External EEPROM
Writing to the EDID EEPROM
The EDID data can be written to the external EEPROM by
writing data via the I2C control interface or via the HDMI A
DDC inputs. In both cases, the EDID write procedure is as
follows:
1. Write Value 0x96 to the EDID EEPROM write protect
address is required to write to this register.
2. Write the EDID data to the EEPROM fixed part address.
Data must be written one byte at a time.
3. Write Value 0x00 to the EDID EEPROM write protect
password register, Register 0x0F.
EDID Replication with External Microcontroller
The on-chip SRAM can be preloaded using an external micro-
controller. Prior to loading the SRAM, disable the I2C master by
writing 0x01 to the EDID replication mode register, Register 0x0E.
The microcontroller can then write EDID information into the
SRAM via the ADV3002 I2C control interface. The writes to the SRAM should be to the fixed part address of 0xA0. When the
EDID copy process is complete, enable the EDID replication
function by writing 0x00 to the EDID replication mode register
(Register 0x0E). The EDID_SDA and EDID_SCL pins are
unused when an external microcontroller is used to program
the SRAM. These pins can be tied either high or low through a
resistor, but should not be left floating.
Reset
Pullling the RESETB pin low initiates a restart of the EDID
replication procedure shown i
n Figure 29 when the local system
supply is on. If the local system supply is off, the RESETB pin
has no effect.
5 V COMBINER
The 5 V combiner circuit combines the four 5 V supplies from
the four HDMI sources and provides the necessary power to the
ADV3002 EDID replication circuit, the CEC buffer, as well as
the external EDID EEPROM, if applicable. The combiner circuit is
designed such that the current limits on each of the 5 V supplies
are not exceeded when the local system power is either on or off.
A simplified circuit diagram of the 5 V combiner is shown in
Figure 30. The combiner detects the presence of the voltage on
the 5 V pin (P5V_x) from the HDMI connectors and closes the
respective internal switch to connect the 5 V to AMUXVCC. If
the local system 3.3 V and 5 V supplies are available, then the
combiner opens all the switches.
P5V_A
P5V_B
P5V_C
P5V_D
AMUXVCC
07905-
010
DETECT
Figure 30. 5 V Combiner Simplified Circuit Diagram