参数资料
型号: AGLE600V5-FGG484I
厂商: Microsemi SoC
文件页数: 79/166页
文件大小: 0K
描述: IC FPGA 1KB FLASH 600K 484-FBGA
标准包装: 60
系列: IGLOOe
逻辑元件/单元数: 13824
RAM 位总计: 110592
输入/输出数: 270
门数: 600000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 484-BGA
供应商设备封装: 484-FPBGA(23x23)
IGLOOe Low Power Flash FPGAs
II
Revision 13
I/Os Per Package 1
IGLOOe FPGAs Package Sizes Dimensions
IGLOOe Device Status
IGLOOe Devices
AGLE600
AGLE3000
ARM-Enabled IGLOOe Devices
M1AGLE3000
Package
I/O Types
Single-Ended
I/O1
Differential
I/O Pairs
Single-Ended
I/O1
Differential
I/O Pairs
FG256
165
79
FG484
270
135
341
168
FG896
620
310
Notes:
1. When considering migrating your design to a lower- or higher-density device, refer to the IGLOOe FPGA Fabric User’s Guide to
ensure compliance with design and board migration requirements.
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For AGLE3000 devices, the usage of certain I/O standards is limited as follows:
– SSTL3(I) and (II): up to 40 I/Os per north or south bank
– LVPECL / GTL+ 3.3 V / GTL 3.3 V: up to 48 I/Os per north or south bank
– SSTL2(I) and (II) / GTL+ 2.5 V/ GTL 2.5 V: up to 72 I/Os per north or south bank
4. FG256 and FG484 are footprint-compatible packages.
5. When using voltage-referenced I/O standards, one I/O pin should be assigned as a voltage-referenced pin (VREF) per
minibank (group of I/Os).
6. When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular I/O, the number of single-ended
user I/Os available is reduced by one.
7. "G" indicates RoHS-compliant packages. Refer to "IGLOOe Ordering Information" on page III for the location of the "G" in the
part number.
Package
FG256
FG484
FG896
Length × Width (mm × mm)
17 × 17
23 × 23
31 × 31
Nominal Area (mm2)
289
529
961
Pitch (mm)
1
Height (mm)
1.6
2.23
IGLOOe Devices
Status
M1 IGLOOe Devices
Status
AGLE600
Production
AGLE3000
Production
M1AGLE3000
Production
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