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参数资料
| 型号： | AM29DS163DT120WAK |
| 厂商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory |
| 中文描述： | 16兆位的CMOS 1.8伏只，同时作业快闪记忆体 |
| 文件页数： | 23/50页 |
| 文件大小： | 1682K |
| 代理商： | AM29DS163DT120WAK |
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Am29DS163D
23
A D V A N C E I N F O R M A T I O N
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device
operations.
Table 14 on page 27
defines the valid reg-
ister command sequences. Writing
incorrect
address
and data values
or writing them in the
improper se-
quence
resets the device to reading array data.
All addresses are latched on the falling edge of WE#
or CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens
first. Refer to the AC Characteristics section for timing
diagrams.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. Each bank is ready to read array data
after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command,
the corresponding bank enters the erase-sus-
pend-read mode, after which the system can read
data from any non-erase-suspended sector within the
same bank. After completing a programming operation
in the Erase Suspend mode, the system may once
again read array data with the same exception. See
the
“Erase Suspend/Erase Resume Commands” on
page 26
section for more information.
The system
must
issue the reset command to return a
bank to the read (or erase-suspend-read) mode if DQ5
goes high during an active program or erase opera-
tion, or if the bank is in the autoselect mode. See the
next section,
“Reset Command"
, for more information.
See also
“Requirements for Reading Array Data” on
page 10
for more information.
Table on page 36
pro-
vides the read parameters, and
Figure 13, on page 36
shows the timing diagram.
Reset Command
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the bank to which the sys-
tem was writing to reading array data. Once erasure
begins, however, the device ignores reset commands
until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to reading array data. If
the program command sequence is written to a bank
that is in the Erase Suspend mode, writing the reset
command returns that bank to the erase-sus-
pend-read mode. Once programming begins, however,
the device ignores reset commands until the operation
is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must be written to return to reading array data. If a
bank entered the autoselect mode while in the Erase
Suspend mode, writing the reset command returns
that bank to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to read-
ing array data (or erase-suspend-read mode if that
bank was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
Table 14 on page 27
shows the address and data re-
quirements. This method is an alternative to that
shown in
Table 7 on page 15
, which is intended for
PROM programmers and requires V
ID
on address pin
A9. The autoselect command sequence may be writ-
ten to an address within a bank that is either in the
read or erase-suspend-read mode. The autoselect
command may not be written while the device is ac-
tively programming or erasing in the other bank.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the
autoselect command. The bank then enters the
autoselect mode. The system may read at any address
within the same bank any number of times without ini-
tiating another autoselect command sequence. The fol-
lowing table describes the hex address requirements
for the various autoselect functions, and the resulting
data. BA represents the bank address, and SA repre-
sents the sector address.
* For byte mode, ignore data output bits D8–DQ15.
Description
Word
Address
Byte
Address
Read Data*
Manufacturer
ID
(BA) + 00
(BA) + 00
01
Device ID
(BA) + 01
(BA) + 02
2295 (top boot)
2296 (bottom boot)
Sector Block
Protect Verify
(SA) + 02
(SA) + 04
00 (unlocked),
01 (locked)
SecSi Sector
Factory
Protect
(BA) + 03
(BA) + 06
85 (factory locked)
05 (not factory locked)
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