参数资料
型号: AM79C965KCW
厂商: ADVANCED MICRO DEVICES INC
元件分类: 微控制器/微处理器
英文描述: 3 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP16
封装: PLASTIC, QFP-160
文件页数: 218/220页
文件大小: 1197K
代理商: AM79C965KCW
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页第185页第186页第187页第188页第189页第190页第191页第192页第193页第194页第195页第196页第197页第198页第199页第200页第201页第202页第203页第204页第205页第206页第207页第208页第209页第210页第211页第212页第213页第214页第215页第216页第217页当前第218页第219页第220页
P R E L I M I N A R Y
AMD
97
Am79C965
Carrier Sense, Transmit Active and Collision Present
indication.
T-MAU gets reset during power-up by H_RESET, by
S_RESET when reset port is read, or by asserting the
RESET pin. T-MAU is not reset by STOP.
Twisted Pair Transmit Function
The differential driver circuitry in the TXD
± and TXP±
pins provides the necessary electrical driving capability
and the pre-distortion control for transmitting signals
over maximum length Twisted Pair cable, as specified
by the 10BASE-T supplement to the ISO 8802-3 (IEEE/
ANSI 802.3) Standard. The transmit function for data
output meets the propagation delays and jitter specified
by the standard.
Twisted Pair Receive Function
The receiver complies with the receiver specifications of
the ISO 8802-3 (IEEE/ANSI 802.3) 10BASE-T Stan-
dard, including noise immunity and received signal re-
jection criteria (‘Smart Squelch’). Signals meeting this
criteria appearing at the RXD
± differential input pair are
routed to the MENDEC. The receiver function meets the
propagation delays and jitter requirements specified by
the standard. The receiver squelch level drops to half its
threshold value after unsquelch to allow reception of
minimum amplitude signals and to offset carrier fade in
the event of worst case signal attenuation and crosstalk
noise conditions.
Note that the 10BASE-T Standard defines the receive
input amplitude at the external Media Dependent Inter-
face (MDI). Filter and transformer loss are not specified.
The T-MAU receiver squelch levels are defined to ac-
count for a 1 dB insertion loss at 10 MHz, which is typical
for the type of receive filters/transformers employed.
Normal 10BASE-T compatible receive thresholds are
employed when the LRT (CSR15[9]) bit is LOW. When
the LRT bit is set (HIGH), the Low Receive Threshold
option is invoked, and the sensitivity of the T-MAU re-
ceiver is increased. This allows longer line lengths to be
employed, exceeding the 100 m target distance of nor-
mal 10BASE-T (assuming typical 24 AWG cable). The
increased receiver sensitivity compensates for the in-
creased signal attenuation caused by the additional ca-
ble distance.
However, making the receiver more sensitive means
that it is also more susceptible to extraneous noise, pri-
marily caused by coupling from co-resident services
(crosstalk). For this reason, it is recommended that
when using the Low Receive Threshold option that the
service should be installed on 4-pair cable only. Multi-
pair cables within the same outer sheath have lower
crosstalk attenuation, and may allow noise emitted from
adjacent pairs to couple into the receive pair, and be of
sufficient amplitude to falsely unsquelch the T-MAU.
Link Test Function
The link test function is implemented as specified by
10BASE-T standard. During periods of transmit pair in-
activity, ’Link beat pulses’ will be periodically sent over
the twisted pair medium to constantly monitor medium
integrity.
When the link test function is enabled (DLNKTST bit in
CSR15 is cleared), the absence of link beat pulses and
receive data on the RXD
± pair will cause the T-MAU to
go into a link fail state. In the link fail state, data transmis-
sion, data reception, data loopback and the collision de-
tection functions are disabled, and remain disabled until
valid data or >5 consecutive link pulses appear on the
RXD
± pair. During link fail, the Link Status signal is inac-
tive. When the link is identified as functional, the Link
Status signal is asserted. The
LNKST pin displays the
Link Status signal by default.
Transmission attempts during Link Fail state will pro-
duce no network activity and will produce LCAR and
CERR error indications.
In order to inter-operate with systems which do not im-
plement Link Test, this function can be disabled by set-
ting the DLNKTST bit in CSR15. With link test disabled,
the data driver, receiver and loopback functions as well
as collision detection remain enabled irespective of the
presence or absence of data or link pulses on the RXD
±
pair. Link Test pulses continue to be sent regardless of
the state of the DLNKTST bit.
Polarity Detection and Reversal
The T-MAU receive function includes the ability to invert
the polarity of the signals appearing at the RXD
± pair if
the polarity of the received signal is reversed (such as in
the case of a wiring error). This feature allows data
frames received from a reverse wired RXD
± input pair to
be corrected in the T-MAU prior to transfer to the
MENDEC. The polarity detection function is activated
following H_RESET or Link Fail, and will reverse the
receive polarity based on both the polarity of any previ-
ous link beat pulses and the polarity of subsequent
frames with a valid End Transmit Delimiter (ETD).
When in the Link Fail state, the T-MAU will recognize
link beat pulses of either positive or negative polarity.
Exit from the Link Fail state is made due to the reception
of 5–6 consecutive link beat pulses of identical polarity.
On entry to the Link Pass state, the polarity of the last 5
link beat pulses is used to determine the initial receive
polarity configuration and the receiver is reconfigured to
subsequently recognize only link beat pulses of the pre-
viously recognized polarity.
Positive link beat pulses are defined as received signal
with a positive amplitude greater than 585 mV (LRT =
HIGH) with a pulse width of 60 ns–200 ns. This positive
excursion may be followed by a negative excursion.
This definition is consistent with the expected received
signal at a correctly wired receiver, when a link beat
pulse which fits the template of Figure 14-12 of the
10BASE-T Standard is generated at a transmitter and
passed through 100 m of twisted pair cable.
Negative link beat pulses are defined as received sig-
nals with a negative amplitude greater than 585 mV with
a pulse width of 60 ns–200 ns. This negative excursion
相关PDF资料
PDF描述
AM80A-024L-120F18 1-OUTPUT 240 W DC-DC REG PWR SUPPLY MODULE
AJ80A-024L-033F50 1-OUTPUT 240 W DC-DC REG PWR SUPPLY MODULE
AM93LC66S 4096-bits Serial Electrically Erasable PROM
AM93LC66SA 4096-bits Serial Electrically Erasable PROM
AM93LC66VN 4096-bits Serial Electrically Erasable PROM
相关代理商/技术参数
参数描述
AM79C970 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C970A 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: