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参数资料
| 型号： | AT83C5112 |
| 厂商： | Atmel Corp. |
| 英文描述： | 8-bit Microcontroller with A/D Converter |
| 中文描述： | 8位微控制器与A / D转换器 |
| 文件页数： | 25/97页 |
| 文件大小： | 1229K |
| 代理商： | AT83C5112 |
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25
AT8xC5112
4191B
–
8051
–
04/03
Dual Data Pointer
Register
The additional data pointer can be used to speed up code execution and reduce code
size in a number of ways.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called DPS = AUXR1/bit0 (see Table 21) that allows the pro-
gram code to switch between them (Refer to Figure 6).
Figure 6.
Use of Dual Pointer
Table 21.
AUXR1: Auxiliary Register 1
Note:
User software should not write 1s to reserved bits. These bits may be used in future 8051
family products to invoke new feature. In that case, the reset value of the new bit will be
0, and its active value will be 1. The value read from a reserved bit is indeterminate.
External Data Memory
AUXR1(A2H)
DPS
DPH(83H) DPL(82H)
0
7
DPTR0
DPTR1
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
DPS
Bit
Number
Bit
Mnemonic Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
0
DPS
Data Pointer Selection
Clear to select DPTR0.
Set to select DPTR1.
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