参数资料
型号: AT83C5112
厂商: Atmel Corp.
英文描述: 8-bit Microcontroller with A/D Converter
中文描述: 8位微控制器与A / D转换器
文件页数: 9/97页
文件大小: 1229K
代理商: AT83C5112
9
AT8xC5112
4191B
8051
04/03
Functional Block Diagram
Operating Modes
Functional Modes
Normal Modes
CPU and Peripheral clocks depend on the software selection using CKCON0,
CKCON1, CKSEL and CKRL registers.
CKS bit selects either Xtal_Osc or RC_Osc.
CKRL register determines the frequency of the selected clock, unless X2 bit is set.
In this case the prescaler/divider is not used, so CPU core needs only 6-clock
periods per machine cycle. According to the value of the peripheral X2 individual bit,
each peripheral needs 6 or 12 clock period per instructions.
It is always possible to switch dynamically by software from Xtal_Osc to RC_Osc,
and vice versa by changing CKS bit, a synchronization cell allowing to avoid any
spike during transition.
Idle Modes
IDLE modes are achieved by using any instruction that writes into PCON.0 sfr
IDLE modes A and B depend on previous software sequence, prior to writing into
PCON.0 register:
IDLE MODE A: Xtal_Osc is running (OSCAEN = 1) and selected (CKS = 1)
IDLE MODE B: RC_Osc is running (OSCBEN = 1) and selected (CKS = 0)
The unused oscillator Xtal_Osc or RC_Osc can be stopped by software by clearing
OSCAEN or OSCBEN respectively.
Exit from IDLE mode is achieved by Reset, or by activation of an enabled interrupt.
In both cases, PCON.0 is cleared by hardware.
Xtal2
Xtal1
PwdRC
WD clock
PwdOsc
Ckrl
Reload
8-bit
Prescaler-Divider
ResetB
1
0
OscOut
Xtal_Osc
OSCA
RC_Osc
OSCB
OSCBEN
OSCAEN
CKS
X2
0
1
Mux
+
Filter
CkIdle
Ck
Idle
CPU clock
Peripherals clock
Pwd
CkOut
CkAdc
Quiet
: 128
A/D clock
Sub Clock
Timer 0 clock
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