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参数资料
| 型号： | AT83C5112 |
| 厂商： | Atmel Corp. |
| 英文描述： | 8-bit Microcontroller with A/D Converter |
| 中文描述： | 8位微控制器与A / D转换器 |
| 文件页数： | 38/97页 |
| 文件大小： | 1229K |
| 代理商： | AT83C5112 |
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38
AT8xC5112
4191B
–
8051
–
04/03
Functional Description
Figure 13 shows a detailed structure of the SPI module.
Figure 13.
SPI Module Block Diagram
Operating Modes
The Serial Peripheral Interface can be configured as Master mode only. The configura-
tion and initialization of the SPI module is made through one register:
The Serial Peripheral CONtrol register (SPCON)
Once the SPI is configured, the data exchange is made using:
SPCON
The Serial Peripheral STAtus register (SPSTA)
The Serial Peripheral DATa register (SPDAT)
During an SPI transmission, data is simultaneously transmitted (shifted out serially) and
received (shifted in serially). A serial clock line (SCK) synchronizes shifting and sam-
pling on the two serial data lines (MOSI and MISO).
When the Master device transmits data to the Slave device via the MOSI line, the Slave
device responds by sending data to the Master device via the MISO line. This implies
full-duplex transmission with both data out and data in synchronized with the same clock
(Figure 14).
Shift Register
0
1
2
3
4
5
6
7
Internal Bus
Pin
Control
Logic
MISO
MOSI
SCK
SS
M
S
Clock
Logic
Clock
Divider
Clock
Select
/2
/4
/8
/16
/64
/128
SPI Interrupt Request
8-bit bus
1-bit signal
CkIdle
/32
Receive Data Register
SPDAT
SPI
Control
SPSTA
CPHA
SPR0
SPCON
SPR1
CPOL
MSTR
SSDIS
SPEN
SPR2
WCOL
MODF
SPIF
-
-
-
-
-
External Clk
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