参数资料
型号: AT83C5112
厂商: Atmel Corp.
英文描述: 8-bit Microcontroller with A/D Converter
中文描述: 8位微控制器与A / D转换器
文件页数: 74/97页
文件大小: 1229K
代理商: AT83C5112
74
AT8xC5112
4191B
8051
04/03
Programming Algorithm
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and
decreases the number of pulses applied during byte programming from 25 to 1.
To program the AT8xC5112 the following sequence must be exercised:
Step 1: Activate the combination of control signals.
Step 2: Input the valid address on the address lines.
Step 3: Input the appropriate data on the data lines.
Step 4: Raise RST/VPP from VCC to VPP (typical 12.75V).
Step 5: Pulse ALE/PROG once.
Step 6: Lower RST/VPP from VPP to VCC
Repeat step 2 through 6 changing the address and data for the entire array or until the
end of the object file is reached (See Figure 31).
Programming CONF Byte
After having apply the proper test mode, algorithm for programming CONF byte is simi-
lar to the previous programming algorithm with no address to present on the address
lines.
Verify Algorithm
Code array verify must be done after each byte or block of bytes is programmed. In
either case, a complete verify of the programmed array will ensure reliable programming
of the T87C5112.
P 2.7 is used to enable data output.
To verify the T87C5112 code the following sequence must be exercised:
Step 1: Activate the combination of program and control signals.
Step 2: Input the valid address on the address lines.
Step 3: Read data on the data lines.
Repeat step 2 through 3 changing the address for the entire array verification (See
Figure 31).
The encryption array cannot be directly verified. Verification of the encryption array is
done by observing that the code array is well encrypted.
Verify CONF Byte
After having apply the proper test mode, algorithm for read/verify CONF byte is similar
to the previous verify algorithm with no address to present on the address lines.
Figure 31.
Programming and Verification Signal
s Waveform
Control
signals
Data In
ALE/PROG
A0-A12
Programming Cycle
100
μ
s
D0-D7
RST/VPP
Data Out
Read/Verify Cycle
12.75V
5V
0V
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