参数资料
型号: AT89C51SND2C-7FTUL
厂商: Atmel
文件页数: 134/160页
文件大小: 0K
描述: IC 8051 MCU FLASH 64K MP3 100BGA
标准包装: 260
系列: 89C
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: I²C,IDE/ATAPI,MMC,SPI,UART/USART,USB
外围设备: 音频,I²S,MP3,PCM,POR,WDT
输入/输出数: 32
程序存储器容量: 64KB(64K x 8)
程序存储器类型: 闪存
RAM 容量: 2.25K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.3 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TFBGA
包装: 托盘
其它名称: AT89C51SND2C7FTUL
34
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
DS508F2
EP7312
High-Performance, Low-Power System on Chip
79
SMPCLK
1
Low
O
SSI1 ADC sample clock
80
FB[1]
I
PWM feedback input
81
VSSIO
Pad Gnd
I/O ground
82
FB[0]
I
PWM feedback input
83
COL[7]
1
High
O
Keyboard scanner column
drive
84
COL[6]
1
High
O
Keyboard scanner column
drive
85
COL[5]
1
High
O
Keyboard scanner column
drive
86
COL[4]
1
High
O
Keyboard scanner column
drive
87
COL[3]
1
High
O
Keyboard scanner column
drive
88
COL[2]
1
High
O
Keyboard scanner column
drive
89
VDDIO
Pad Pwr
Digital I/O power, 3.3 V
90
TCLK
I
JTAG clock
91
COL[1]
1
High
O
Keyboard scanner column
drive
92
COL[0]
1
High
O
Keyboard scanner column
drive
93
BUZ
1
Low
O
Buzzer drive output
94
D[31]
1
Low
I/O
Data I/O
95
D[30]
1
Low
I/O
Data I/O
96
D[29]
1
Low
I/O
Data I/O
97
D[28]
1
Low
I/O
Data I/O
98
VSSIO
Pad Gnd
I/O ground
99
A[27]/DRA[0]
2
Low
O
System byte address /
SDRAM address
100
D[27]
1
Low
I/O
Data I/O
101
A[26]/DRA[1]
2
Low
O
System byte address /
SDRAM address
102
D[26]
1
Low
I/O
Data I/O
103
A[25]/DRA[2]
2
Low
O
System byte address /
SDRAM address
104
D[25]
1
Low
I/O
Data I/O
105
HALFWORD
1
Low
O
Halfword access select output
106
A[24]/DRA[3]
1
Low
O
System byte address /
SDRAM address
107
VDDIO
Pad Pwr
Digital I/O power, 3.3 V
108
VSSIO
Pad Gnd
I/O ground
109
D[24]
1
Low
I/O
Data I/O
110
A[23]/DRA[4]
1
Low
O
System byte address /
SDRAM address
111
D[23]
1
Low
I/O
Data I/O
112
A[22]/DRA[5]
1
Low
O
System byte address /
SDRAM address
113
D[22]
1
Low
I/O
Data I/O
114
A[21]/DRA[6]
1
Low
O
System byte address /
SDRAM address
115
D[21]
1
Low
I/O
Data I/O
116
VSSIO
Pad Gnd
I/O ground
117
A[20]/DRA[7]
1
Low
O
System byte address /
SDRAM address
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal
Strength
Reset
State
Type
Description
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