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参数资料
型号： AT89C51SND2C-7FTUL
厂商： Atmel
文件页数： 76/160页
文件大小： 0K
描述： IC 8051 MCU FLASH 64K MP3 100BGA
标准包装： 260
系列： 89C
核心处理器： 8051
芯体尺寸： 8-位
速度： 40MHz
连通性： I²C，IDE/ATAPI，MMC，SPI，UART/USART，USB
外围设备： 音频，I²S，MP3，PCM，POR，WDT
输入/输出数： 32
程序存储器容量： 64KB（64K x 8）
程序存储器类型： 闪存
RAM 容量： 2.25K x 8
电压 - 电源 (Vcc/Vdd)： 2.7 V ~ 3.3 V
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 100-TFBGA
包装： 托盘
其它名称： AT89C51SND2C7FTUL
20
4341H–MP3–10/07
AT8xC51SND2C/MP3B
6.2.3
Hardware Security Space
This space is composed of one Byte: the Hardware Security Byte (HSB see Table 6-3) divided in
2 separate nibbles. The MSN contains the X2 mode configuration bit and the Boot Loader Jump
Bit as detailed in Section “Boot Memory Execution”, page 20 and can be written by software
while the LSN contains the lock system level to protect the memory content against piracy as
detailed in Section “Hardware Security System”, page 20 and can only be written by hardware.
6.2.4
Extra Row Space
This space is composed of 2 Bytes:
The Software Boot Vector (SBV, see Table 6-4).
This Byte is used by the software boot loader to build the boot address.
The Software Security Byte (SSB, see Table 6-5).
This Byte is used to lock the execution of some boot loader commands.
6.3
Hardware Security System
The AT89C51SND2C implements three lock bits LB2:0 in the LSN of HSB (see Table 6-3) pro-
viding three levels of security for user’s program as described in Table 6-1 while the
AT83SND2C is always set in read disabled mode.
Level 0 is the level of an erased part and does not enable any security feature.
Level 1 locks the hardware programming of both user and boot memories.
Level 2 locks also hardware verifying of both user and boot memories
Level 3 locks also the external execution.
Notes:
1. U means unprogrammed, P means programmed and X means don’t care (programmed or
unprogrammed).
2. AT89C51SND2C products are delivered with third level programmed to ensure that the code
programmed by software using ISP or user’s boot loader is secured from any hardware piracy.
6.4
Boot Memory Execution
As internal C51 code space is limited to 64K Bytes, some mechanisms are implemented to allow
boot memory to be mapped in the code space for execution at addresses from F000h to FFFFh.
The boot memory is enabled by setting the ENBOOT bit in AUXR1 (see Figure 6-2). The three
ways to set this bit are detailed in the following sections.
6.4.1
Software Boot Mapping
The software way to set ENBOOT consists in writing to AUXR1 from the user’s software. This
enables boot loader or API routines execution.
Table 6-1.
Lock Bit Features(1)
Level
LB2
LB1
LB0
Internal
Execution
External
Execution
Hardware
Verifying
Hardware
Programming
Software
Programming
0
U
Enable
1
U
P
Enable
Disable
Enable
2
U
P
X
Enable
Disable
Enable
3(3)
P
X
Enable
Disable
Enable
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