- 您现在的位置：买卖IC网 > PDF目录298892 > B80547RE083256 (INTEL CORP) 32-BIT, 3060 MHz, MICROPROCESSOR, PBGA775 PDF资料下载
参数资料
| 型号： | B80547RE083256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 3060 MHz, MICROPROCESSOR, PBGA775 |
| 封装： | FLIP CHIP, LGA-775 |
| 文件页数： | 62/94页 |
| 文件大小： | 2796K |
| 代理商： | B80547RE083256 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页当前第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页
Datasheet
65
Land Listing and Signal Descriptions
DEFER#
Input
DEFER# is asserted by an agent to indicate that a transaction cannot be
guaranteed in-order completion. Assertion of DEFER# is normally the
responsibility of the addressed memory or Input/Output agent. This signal
must connect the appropriate pins/lands of all processor FSB agents.
DP[3:0]#
Input/
Output
DP[3:0]# (Data Parity) provide parity protection for the D[63:0]# signals.
They are driven by the agent responsible for driving D[63:0]#, and must
connect the appropriate pins/lands of all processor FSB agents.
DRDY#
Input/
Output
DRDY# (Data Ready) is asserted by the data driver on each data transfer,
indicating valid data on the data bus. In a multi-common clock data
transfer, DRDY# may be de-asserted to insert idle clocks. This signal must
connect the appropriate pins/lands of all processor FSB agents.
DSTBN[3:0]#
Input/
Output
Data strobe used to latch in D[63:0]#.
DSTBP[3:0]#
Input/
Output
Data strobe used to latch in D[63:0]#.
EDRDY#
Input
This signal indicates to the processor that the memory controller is about to
drive data on the bus based on a read request. The signal is driven from
the memory controller one BCLK[1:0] prior to data being driven on the bus.
EDRDY# is not a feature of the Celeron D processor in the 775-land
package. It is included here for future processor compatibility.
FERR#/PBE#
Output
FERR#/PBE# (Floating Point Error/Pending Break Event) is a multiplexed
signal and its meaning is qualified by STPCLK#. When STPCLK# is not
asserted, FERR#/PBE# indicates a floating-point error and will be asserted
when the processor detects an unmasked floating-point error. When
STPCLK# is not asserted, FERR#/PBE# is similar to the ERROR# signal
on the Intel 387 coprocessor, and is included for compatibility with systems
using MS-DOS*-type floating-point error reporting. When STPCLK# is
asserted, an assertion of FERR#/PBE# indicates that the processor has a
pending break event waiting for service. The assertion of FERR#/PBE#
indicates that the processor should be returned to the Normal state. For
additional information on the pending break event functionality, including
the identification of support of the feature and enable/disable information,
refer to volume 3 of the Intel Architecture Software Developer's Manual and
the Intel Processor Identification and the CPUID Instruction application
note.
GTLREF[1:0]
Input
GTLREF0 determines the signal reference level for GTL+ input signals.
GTLREF1 is not a feature of the Celeron D processor in the 775-Land
package. It is included here for future processor compatibility. GTLREF0 is
used by the GTL+ receivers to determine if a signal is a logical 0 or logical
1.
Table 4-3. Signal Description (Sheet 4 of 9)
Name
Type
Description
Signals
Associated Strobe
D[15:0]#, DBI0#
DSTBN0#
D[31:16]#, DBI1#
DSTBN1#
D[47:32]#, DBI2#
DSTBN2#
D[63:48]#, DBI3#
DSTBN3#
Signals
Associated Strobe
D[15:0]#, DBI0#
DSTBP0#
D[31:16]#, DBI1#
DSTBP1#
D[47:32]#, DBI2#
DSTBP2#
D[63:48]#, DBI3#
DSTBP3#
相关PDF资料 |
PDF描述 |
|---|---|
| BX80547RE2800CN | 32-BIT, 2930 MHz, MICROPROCESSOR, PBGA775 |
| BX80547RE3066C | 32-BIT, 3060 MHz, MICROPROCESSOR, PBGA775 |
| BX80547RE3200CN | 32-BIT, 3200 MHz, MICROPROCESSOR, PBGA775 |
| BX80547RE3066CN | 32-BIT, 3060 MHz, MICROPROCESSOR, PBGA775 |
| B80547RE061256 | 32-BIT, 2530 MHz, MICROPROCESSOR, PBGA775 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| B8055 | 功能描述:函数发生器与合成器 Function Generator 5MHz RoHS:否 制造商:Tektronix 频率:20 MHz 设备类型:Function Generators |
| B-80-6 | 制造商:Hozan Tool Industrial Co Ltd 功能描述: |
| B8062N | 制造商:Laird Technologies Inc 功能描述:WHIP,MC,1/2,806-899 MHZ |
| B8062NCO | 功能描述:ACCY MISC RC B8062N ANTENNA RoHS:是 类别:RF/IF 和 RFID >> RF配件 系列:* 标准包装:1 系列:* |
| B8063 | 制造商:Laird Technologies Inc 功能描述:WHIP,MC,5/8,806-866 MHZ |
发布紧急采购，3分钟左右您将得到回复。