参数资料
型号: COP8CDR9HVA8/NOPB
厂商: National Semiconductor
文件页数: 21/111页
文件大小: 0K
描述: IC MCU CMOS 8BIT 44-PLCC
标准包装: 25
系列: COP8™ 8C
核心处理器: COP8
芯体尺寸: 8-位
速度: 20MHz
连通性: Microwire/Plus(SPI),UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 37
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 16x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LCC(J 形引线)
包装: 管件
其它名称: *COP8CDR9HVA8
*COP8CDR9HVA8/NOPB
COP8CDR9HVA8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
4
Pin Descriptions
The COP8CBR/CCR/CDR I/O structure enables designers to reconfigure the microcontroller's I/O
functions with a single instruction. Each individual I/O pin can be independently configured as output pin
low, output high, input with high impedance or input with weak pull-up device. A typical example is the use
of I/O pins as the keyboard matrix input lines. The input lines can be programmed with internal weak pull-
ups so that the input lines read logic high when the keys are all open. With a key closure, the
corresponding input line will read a logic zero since the weak pull-up can easily be overdriven. When the
key is released, the internal weak pull-up will pull the input line back to logic high. This eliminates the need
for external pull-up resistors. The high current options are available for driving LEDs, motors and
speakers. This flexibility helps to ensure a cleaner design, with less external components and lower costs.
Below is the general description of all available pins.
VCC and GND are the power supply pins. All VCC and GND pins must be connected.
Users of the WQFN package are cautioned to be aware that the central metal area and the pin 1 index
mark on the bottom of the package may be connected to GND. See figure below:
Figure 4-1. WQFN Package Bottom View
CKI is the clock input. This can be connected (in conjunction with CKO) to an external crystal circuit to
form a crystal oscillator. See Oscillator Description section.
RESET is the master reset input. See Reset description section.
AVCC is the Analog Supply for A/D converter. It should be connected to VCC externally. This is also the top
of the resistor ladder D/A converter used within the A/D converter.
AGND is the ground pin for the A/D converter. It should be connected to GND externally. This is also the
bottom of the resistor ladder D/A converter used within the A/D converter.
The device contains up to six bidirectional 8-bit I/O ports (A, B, C, E, G and L) and one 4-bit I/O port (F),
where each individual bit may be independently configured as an input (Schmitt trigger inputs on ports L
and G), output or TRI-STATE under program control. Three data memory address locations are allocated
for each of these I/O ports. Each I/O port has three associated 8-bit memory mapped registers, the
CONFIGURATION register, the output DATA register and the Pin input register. (See the memory map for
the various addresses associated with the I/O ports.) Figure 4-2 shows the I/O port configurations. The
DATA and CONFIGURATION registers allow for each port bit to be individually configured under software
control as shown below:
Copyright 2000–2013, Texas Instruments Incorporated
Pin Descriptions
17
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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