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参数资料
| 型号： | CS5165GDWR16 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 稳压器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 16/21页 |
| 文件大小： | 718K |
| 代理商： | CS5165GDWR16 |
CS5165
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS (continued) (0°C < TA < +70°C; 0°C < TJ < +125°C; 8.0 V < VCC < 14 V; 2.8 DAC Code:
(VID4 = VID2 = VID1 = VID0 = 1; VID3 = 0); CGATE(H) and CGATE(L) = 3.3 nF; COFF = 330 pF; CSS = 0.1 μF, unless otherwise specified.)
Characteristic
Unit
Max
Typ
Min
Test Conditions
Fault Protection
SS Charge Time
VFB = 0 V
1.6
3.3
5.0
ms
SS Pulse Period
VFB = 0 V
25
100
200
ms
SS Duty Cycle
(Charge Time/Period) × 100
1.0
3.3
6.0
%
SS COMP Clamp Voltage
VFB = 2.7 V; VSS = 0 V
0.50
0.95
1.10
V
VFB Low Comparator
Increase VFB till no SS pulsing and normal Offtime
0.9
1.0
1.1
V
PWM Comparator
Transient Response
VFB = 1.2 to 5.0 V. 500 ns after GATE(H)
(after Blanking time) to GATE(H) = (VCC 1.0 V)
to 1.0 V
100
150
ns
Minimum Pulse Width
(Blanking Time)
Drive VFB. 1.2 to 5.0 V upon GATE(H) rising edge
(> VCC 1.0 V), measure GATE(H) pulse width
50
150
250
ns
COFF
Normal OffTime
VFB = 2.7 V
1.0
1.6
2.3
μs
Extended OffTime
VSS = VFB = 0 V
5.0
8.0
12.0
μs
TimeOut Timer
TimeOut Time
VFB = 2.7 V, Measure GATE(H) Pulse Width
10
30
50
μs
Fault Duty Cycle
VFB = 0V
30
50
70
%
Enable Input
ENABLE Threshold
GATE(H) Switching
0.8
1.15
1.30
V
Shutdown delay (Note 3)
ENABLEtoGATE(H) < 2.0 V
3.0
μs
Pullup Current
ENABLE = 0 V
3.0
7.0
15
μA
Pullup Voltage
No load on ENABLE pin
1.30
1.8
3.0
V
Input Resistance
ENABLE = 5.0 V, R = (5.0 V VPULLUP)/IENABLE
10
20
50
kΩ
Power Good Output
Low to High Delay
VFB = (0.8 × VDAC) to VDAC
30
65
110
μs
High to Low Delay
VFB = VDAC to (0.8 × VDAC)
30
75
120
μs
Output Low Voltage
VFB = 2.4 V, IPWRGD = 500 μA
0.2
0.3
V
Sink Current Limit
VFB = 2.4 V, PWRGD = 1.0 V
0.5
4.0
15.0
mA
3. Guaranteed by design, not 100% tested in production.
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