参数资料
| 型号： | CS82C37A96 |
| 厂商： | Intersil |
| 文件页数： | 18/24页 |
| 文件大小： | 0K |
| 描述： | IC CMOS DMA CONTROLLER 44PLCC |
| 标准包装： | 500 |
| 应用： | CMOS DMA 控制器 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 2mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC |
| 包装： | 带卷 (TR) |
82C37A
AC Electrical Specifications
V CC = +5.0V ± 10%, GND = 0V, T A = 0 o C to +70 o C (C82C37A),
T A = -40 o C to +85 o C (I82C37A),
T A = -55 o C to +125 o C (M82C37A) (Continued)
82C37A-5
82C37A
82C37A-12
SYMBOL
(63)TRHDI
(64)TAZRL
PARAMETER
READ HIGH to DACK Inactive
ADR Float to READ LOW
MIN
12
-2.5
MAX
-
-
MIN
12
-2.5
MAX
-
-
MIN
12
-2.5
MAX
-
-
UNITS
ns
ns
PERIPHERAL (SLAVE) MODE
(41)TAR
(42)TAWL
(43)TCWL
(44)TDW
(45)TRA
(46)TRDE
(47)TRDF
(48)TRSTD
ADR Valid or CS LOW to READ LOW
ADR Valid to WRITE LOW Setup Time
CS LOW to WRITE LOW Setup Time
Data Valid to WRITE HIGH Setup Time
ADR or CS Hold from READ HIGH
Data Access from READ
DB Float Delay from READ HIGH
Power Supply HIGH to RESET LOW
10
0
0
150
0
-
5
500
-
-
-
-
-
140
85
-
10
0
0
100
0
-
5
500
-
-
-
-
-
120
85
-
0
0
0
60
0
-
5
500
-
-
-
-
-
80
55
-
ns
ns
ns
ns
ns
ns
ns
ns
Setup Time
(49)TRSTS
(50)TRSTW
(51)TRW
(52)TWA
(53)TWC
RESET to First IOR or IOW
RESET Pulse Width
READ Pulse Width
ADR from WRITE HIGH Hold Time
CS HIGH from WRITE HIGH
2TCY
300
200
0
0
-
-
-
-
-
2TCY
300
155
0
0
-
-
-
-
-
2TCY
300
85
0
0
-
-
-
-
-
ns
ns
ns
ns
ns
Hold Time
(54)TWD
(55)TWWS
Data from WRITE HIGH Hold Time
WRITE Pulse Width
10
150
-
-
10
100
-
-
10
45
-
-
ns
ns
Timing Waveforms
CS
IOW
TCWL
(43)
TWWS
(55)
TWC (53)
A0 - A3
TAWL
(42)
INPUT VALID
TWA (52)
TDW
(44)
TWD (54)
DB0 - DB7
INPUT VALID
FIGURE 8. SLAVE MODE WRITE
NOTE:
Successive WRITE accesses to the 82C37A must allow at least TCY as recovery time between accesses. A TCY recovery time must be
allowed before executing a WRITE access after a READ access.
18
FN2967.3
October 25, 2011
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