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参数资料
| 型号： | DC939A |
| 厂商： | Linear Technology |
| 文件页数： | 21/42页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2484 |
| 软件下载： | QuikEval System |
| 设计资源： | DC939A Design File DC939A Schematic |
| 标准包装： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 6.8 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2484 |
| 已供物品： | 板 |
| 相关产品： | LTC2484CDD#TRPBF-ND - IC ADC 24BIT 10-DFN LTC2484IDD#TRPBF-ND - IC ADC 24BIT 10-DFN LTC2484IDD#PBF-ND - IC ADC 24BIT 10-DFN LTC2484CDD#PBF-ND - IC ADC 24BIT 10-DFN |
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LTC2484
28
2484fd
APPLICATIONS INFORMATION
Reference Current
In a similar fashion, the LTC2484 samples the differential
reference pins VREF+ and GND transferring small amount
of charge to and from the external driving circuits thus
producing a dynamic reference current. This current does
not change the converter offset, but it may degrade the
gain and INL performance. The effect of this current can
be analyzed in two distinct situations.
For relatively small values of the external reference capaci-
tors (CREF < 1nF), the voltage on the sampling capacitor
settles almost completely and relatively large values for
the source impedance result in only small errors. Such
values for CREF will deteriorate the converter offset and
gain performance without signicant benets of reference
ltering and the user is advised to avoid them.
Larger values of reference capacitors (CREF > 1nF) may be
required as reference lters in certain congurations. Such
capacitors will average the reference sampling charge and
the external source resistance will see a quasi constant
reference differential impedance.
In the following discussion, it is assumed the input and
reference common mode are the same. Using internal
oscillator for 60Hz mode, the typical differential reference
resistance is 1MΩ which generates a full-scale (VREF/2)gain
error of 0.51ppm for each ohm of source resistance driving
the VREF pin. For 50Hz/60Hz mode, the related difference
resistance is 1.1MΩ and the resulting full-scale error is
0.46ppm for each ohm of source resistance driving the
VREF pin. For 50Hz mode, the related difference resistance
is 1.2MΩ and the resulting full-scale error is 0.42ppm for
each ohm of source resistance driving the VREF pin. When
fO is driven by an external oscillator with a frequency fEOSC
(external conversion clock operation), the typical differen-
tial reference resistance is 0.30 1012/fEOSC Ω and each
ohm of source resistance driving the VREF pin will result
CIN
2484 F12
VINCM + 0.5VIN
RSOURCE
IN+
LTC2484
CPAR
20pF
CIN
VINCM – 0.5VIN
RSOURCE
IN–
CPAR
20pF
Figure 12. An RC Network at IN+ and IN–
RSOURCE (Ω)
1
+FS
ERROR
(ppm)
–20
0
20
1k
100k
2484 F13
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
fO = GND
TA = 25°C
CIN = 0pF
CIN = 100pF
CIN = 1nF, 0.1μF, 1μF
Figure 13. +FS Error vs RSOURCE at IN+ or IN–
RSOURCE (Ω)
1
–FS
ERROR
(ppm)
–20
0
20
1k
100k
2484 F14
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
fO = GND
TA = 25°C
CIN = 0pF
CIN = 100pF
CIN = 1nF, 0.1μF, 1μF
Figure 14. –FS Error vs RSOURCE at IN+ or IN–
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