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| 型号： | DK-DEV-4CGX150N |
| 厂商： | Altera |
| 文件页数： | 42/42页 |
| 文件大小： | 0K |
| 描述： | KIT DEVELOPMENT CYCLONE IV GX |
| 应用说明： | Cyclone IV Design Guidelines |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview |
| 软件下载： | DK-DEV-4CGX150N Kit Install |
| 特色产品： | Cyclone? IV GX FPGA Development Kit |
| 标准包装： | 1 |
| 系列： | CYCLONE® IV GX |
| 类型： | FPGA |
| 适用于相关产品： | Cyclone IV GX |
| 所含物品： | 板，线缆，文档，电源 |
| 其它名称： | 544-2713 |
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Chapter 1: Cyclone IV Device Datasheet
1–9
Operating Conditions
December 2013
Altera Corporation
The OCT resistance may vary with the variation of temperature and voltage after
calibration at device power-up. Use Table 1–10 and Equation 1–1 to determine the
final OCT resistance considering the variations after calibration at device power-up.
Table 1–10 lists the change percentage of the OCT resistance with voltage and
temperature.
Table 1–10. OCT Variation After Calibration at Device Power
-Up for Cyclone IV Devices
Nominal Voltage
dR/dT (%/°C)
dR/dV (%/mV)
3.0
0.262
–0.026
2.5
0.234
–0.039
1.8
0.219
–0.086
1.5
0.199
–0.136
1.2
0.161
–0.288
R
V = (V2 – V1) × 1000 × dR/dV –––––
R
T = (T2 – T1) × dR/dT –––––
For
R
x < 0; MFx = 1/ (|Rx|/100 + 1) –––––
Notes to Equation 1–1:
(1) T2 is the final temperature.
(2) T1 is the initial temperature.
(3) MF is multiplication factor.
(4) Rfinal is final resistance.
(5) Rinitial is initial resistance.
(6) Subscript x refers to both V and T.
(7)
R
V is a variation of resistance with voltage.
(8)
R
T is a variation of resistance with temperature.
(9) dR/dT is the change percentage of resistance with temperature after calibration at device power
-up.
(10) dR/dV is the change percentage of resistance with voltage after calibration at device power
-up.
(11) V2 is final voltage.
(12) V1 is the initial voltage.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DK-DEV-4CGX150N | 制造商:Altera Corporation 功能描述:KIT STARTER CYCLONE IV GX ((NS |
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