- 您现在的位置：买卖IC网 > PDF目录1916 > DS80C410-FNY+ (Maxim Integrated Products)IC MCU 75MHZ 16MB HP 100-LQFP PDF资料下载
参数资料
| 型号： | DS80C410-FNY+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 53/102页 |
| 文件大小： | 0K |
| 描述： | IC MCU 75MHZ 16MB HP 100-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 90 |
| 系列： | 80C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 75MHz |
| 连通性： | 1 线，CAN，EBI/EMI，以太网，SIO，UART/USART |
| 外围设备： | 电源故障复位，WDT |
| 输入/输出数： | 64 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | ROM |
| RAM 容量： | 64K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.62 V ~ 3.6 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 100-LQFP |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页当前第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页
DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
54 of 102
Buffer Control Unit
The buffer control unit (BCU) serves as the central controller of all DS80C410 Ethernet activity. The BCU regulates
CPU read/write activity to the Ethernet controller blocks through a series of SFRs: BCU control (BCUC; E7h), BCU
data (BCUD; E6h), CSR address (CSRA; E4h), and CSR data (CSRD; E3h). These SFRs allows the CPU to issue
commands to the BCU, exchange packet size/location information with the BCU, configure the on-chip Ethernet
MAC, and even communicate with external PHYs through the MII serial-management bus.
Table 12 outlines the commands that can be issued through the BCUC register. Prior to issuing a write (1000b) or
read (1001b) CSR register command, the CSRA SFR must be configured to address a valid CSR register. For
each CSR register write, the CSRD SFR must be loaded with the data to be written prior to issuing the write
command, whereas on a read, CSRD returns the CSR register data following the read command. Table 13 lists the
CSR register addresses and functions.
Table 12. Buffer Control Unit Commands
COMMAND
(BCUC.3:BCUC.0)
OPERATION
0000
No Operation (default)
0010
Invalidate Current Receive Packet
0011
Flush Receive Buffer
0100
Transmit Request (normal)
0101
Transmit Request (disable padding)
0110
Transmit Request (disable CRC)
1000
Write CSR Register
1001
Read CSR Register
1100
Enable Sleep Mode
1101
Disable Sleep Mode
Other
Reserved
Table 13. CSR Registers
CSR REGISTER ADDRESS
(CSRA)
FUNCTION
00h
MAC Control
04h
Ethernet MAC Physical Address [47:32]
08h
Ethernet MAC Physical Address [31:0]
0Ch
Multicast Address Hash Table [63:32]
10h
Multicast Address Hash Table [31:0]
14h
MII Address
18h
MII Data
1Ch
Flow Control
20h
VLAN1 Tag
24h
VLAN2 Tag
28h
Wake-Up Frame Filter
2Ch
Wake-Up Events Control and Status
Other
Reserved
The BCU is responsible for coordinating and reporting status for all data-packet transactions between the Ethernet
MAC and the 8kB packet-buffer memory. The size of the transmit and receive buffers within the 8kB packet-buffer
memory is user-configurable through the EBS (E5h) register. During transmit and receive operations, the BCU
operates according to the user-defined buffer allocation and tracks consumption of receive buffer memory so that a
receive-buffer-full condition can be signaled.
For a receive operation, the BCU first must assess whether there are any open pages in receive buffer memory to
accommodate an incoming packet. If there are not open pages, the receive-buffer-full (RBF; EBS.6) flag is set.
Until the RBF condition is cleared, all incoming frames are missed. If receive buffer memory has open pages, the
received data is stored in the first open page starting at byte offset 4, leaving the first 4 bytes open for packet status
reporting. Receive packets requiring multiple pages are stored in consecutive pages. Note that the receive buffer
operates as a circular queue, with page 0 being the consecutive page to follow the final (n - 1) receive buffer page.
The BCU stores incoming data to receive buffer memory until the transaction is complete or until the reception is
相关PDF资料 |
PDF描述 |
|---|---|
| DS8102+ | IC MODULATOR/DECODER 16-TSSOP |
| DS8113-JNG+ | IC INTERFACE SMART CARD 28-TSSOP |
| DS8313-RRX+ | IC INTERFACE SMART CARD 28-SOIC |
| DS8500-JND+T&R | IC MODEM HART SGL 3.6V 20-TQFN |
| DS87C520-ENL | IC MCU EPROM/ROM 33MH IND 44TQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS80C410-FNY+ | 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| DS80C411 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Network Microcontrollers with Ethernet and CAN |
| DS80C411-FNY | 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| DS80C411-FNY+ | 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| DS80CH11 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:System Energy Manager |
发布紧急采购，3分钟左右您将得到回复。