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参数资料
| 型号： | DSP56F826BU80E |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 48/56页 |
| 文件大小： | 0K |
| 描述： | IC DSP 80MHZ 64KB FLASH 100LQFP |
| 标准包装： | 90 |
| 系列： | 56F8xx |
| 核心处理器： | 56800 |
| 芯体尺寸： | 16-位 |
| 速度： | 80MHz |
| 连通性： | EBI/EMI，SCI，SPI，SSI |
| 外围设备： | POR，WDT |
| 输入/输出数： | 46 |
| 程序存储器容量： | 67KB（33.5K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 4.5K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 2.25 V ~ 2.75 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 100-LQFP |
| 包装： | 托盘 |
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56F826 Technical Data, Rev. 14
52
Freescale Semiconductor
Use the value obtained by the equation (TJ – TT)/PD, where TT is the temperature of the package case
determined by a thermocouple.
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so
that the thermocouple junction rests on the package. A small amount of epoxy is placed over the
thermocouple junction and over about 1mm of wire extending from the junction. The thermocouple wire
is placed flat against the package case to avoid measurement errors caused by cooling effects of the
thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimizing the size of the clearance is important to minimize the change in
thermal performance caused by removing part of the thermal interface to the heat sink. Because of the
experimental difficulties with this technique, many engineers measure the heat sink temperature and then
back-calculate the case temperature using a separate measurement of the thermal resistance of the
interface. From this case temperature, the junction temperature is determined from the junction-to-case
thermal resistance.
5.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation:
Provide a low-impedance path from the board power supply to each VDD, VDDIO, and VDDA pin on the
controller, and from the board ground to each VSS,VSSIO, and VSSA (GND) pin.
The minimum bypass requirement is to place 0.1
μF capacitors positioned as close as possible to the package
supply pins. The recommended bypass configuration is to place one bypass capacitor on each of the
VDD/VSS pairs, including VDDA/VSSA and VDDIO/VSSIO. Ceramic and tantalum capacitors tend to provide
better performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip VDD, VDDIO, and
VDDA and VSS, VSSIO, and VSSA (GND) pins are less than 0.5 inch per capacitor lead.
Bypass the VDD and VSS layers of the PCB with approximately 100μF, preferably with a high-grade
capacitor such as a tantalum capacitor.
CAUTION
This device contains protective circuitry to guard
against damage due to high static voltage or
electrical fields. However, normal precautions are
advised to avoid application of any voltages higher
than maximum-rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate voltage level.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DSP56F826BU80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F826BU80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP100 3.6V |
| DSP56F826D | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor |
| DSP56F826E | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56F826EVM | 功能描述:开发板和工具包 - 其他处理器 Evaluation Kit For DSP56F826 RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
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