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| 型号： | DSP56F827FG80E |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 17/60页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR 16BIT 128-LQFP |
| 标准包装： | 72 |
| 系列： | 56F8xx |
| 核心处理器： | 56800 |
| 芯体尺寸： | 16-位 |
| 速度： | 80MHz |
| 连通性： | EBI/EMI，SCI，SPI，SSI |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 64 |
| 程序存储器容量： | 136KB（68K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 5K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 2.25 V ~ 2.75 V |
| 数据转换器： | A/D 10x12b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 128-LQFP |
| 包装： | 托盘 |
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56F827 Technical Data, Rev. 12
24
Freescale Semiconductor
PWM pin output sink current4
IOLP
16
—
mA
Input capacitance
CIN
—8
—
pF
Output capacitance
COUT
—12
—
pF
VDD supply current
IDDT5
Run 6
—60
90
mA
Wait7
—35
50
mA
Stop
—6
15
mA
Low Voltage Interrupt, VDDIO power supply8
VEIO
2.4
2.7
3.0
V
Low Voltage Interrupt, VDD power supply9
VEIC
2.0
2.2
2.4
V
Power-on Reset10
VPOR
—1.7
2.0
V
1. Schmitt Trigger inputs are: EXTBOOT, IRQA, IRQB, RESET, TCS, TCK, TRST, TMS, TDI, and RXD1.
2. Analog inputs are: ANA[0:7], XTAL and EXTAL. Specification assumes ADC is not sampling.
3. PWM pin output source current measured with 50% duty cycle.
4. PWM pin output sink current measured with 50% duty cycle.
5. IDDT = IDD + IDDA (Total supply current for VDD + VDDA)
6. Run (operating) IDD measured using 4MHz clock source. All inputs 0.2V from rail; outputs unloaded. All ports configured as inputs;
measured with all modules enabled.
7. Wait IDD measured using external square wave clock source (fosc = 4MHz) into XTAL; all inputs 0.2V from rail; no DC loads; less
than 50pF on all outputs. CL = 20pF on EXTAL; all ports configured as inputs; EXTAL capacitance linearly affects wait IDD; measured
with PLL enabled.
8. This low-voltage interrupt monitors the VDDIO power supply. If VDDIO drops below VEIO, an interrupt is generated. Functionality of
the device is guaranteed under transient conditions when VDDIO >VEIO (between the minimum specified VDDIO and the point when
the VEIO interrupt is generated).
9. This low-voltage interrupt monitors the VDD power supply. If VDDIO drops below VEIC, an interrupt is generated. Functionality of
the device is guaranteed under transient conditions when VDD >VEIC (between the minimum specified VDD and the point when the
VEIC interrupt is generated).
10. Power
–on reset occurs whenever the VDD power supply drops below VPOR. While power is ramping up, this signal remains active
as long as VDD is below VPOR, no matter how long the ramp-up rate is.
Table 3-4 DC Electrical Characteristics (Continued)
Operating Conditions: VSSIO=VSS = VSSA = 0V, VDDA =VDDIO=3.0–3.6V, VDD = 2.25–2.75V, TA = –40° to +85°C, CL ≤ 50pF, fop = 80MHz
Characteristic
Symbol
Min
Typ
Max
Unit
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相关代理商/技术参数 |
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|---|---|
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP128 3.6V |
| DSP56F827PB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F827 16-Bit Hybrid Controller Product Brief |
| DSP56F827PB/D | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F8XXBLUM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F8xx Serial Bootloader User Manual |
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