参数资料
型号: DSP56F827FG80E
厂商: Freescale Semiconductor
文件页数: 9/60页
文件大小: 0K
描述: IC HYBRID CTRLR 16BIT 128-LQFP
标准包装: 72
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: EBI/EMI,SCI,SPI,SSI
外围设备: POR,PWM,WDT
输入/输出数: 64
程序存储器容量: 136KB(68K x 16)
程序存储器类型: 闪存
RAM 容量: 5K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 2.75 V
数据转换器: A/D 10x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 128-LQFP
包装: 托盘
Signals and Package Information
56F827 Technical Data, Rev. 12
Freescale Semiconductor
17
SS
(GPIOF7)
99
Input/Output
SPI Slave Select—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
Port F GPIO—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is SS.
TXD0
(SCLK0)
108
Output
Input/Output
Transmit Data (TXD0)—transmit data output
SPI Serial Clock—In master mode, this pin serves as an output, clocking
slaved listeners. In slave mode, this pin serves as the data clock input.
After reset, the default state is SCI output.
RXD0
(MOSI0)
107
Input
Input/Output
Receive Data (RXD0)—receive data input
SPI Master Out/Slave In—This serial data pin is an input to a master device
and an output from a slave device. The MISO line of a slave device is placed
in the high-impedance state if the slave device is not selected.
TXD1
(MISO0)
106
Output
Input/Output
Transmit Data (TXD1)—transmit data output
SPI Master In/Slave Out—This serial data pin is an output to a master device
and an input from a slave device. The master device places data on the MOSI
line one half-cycle before the clock edge the slave device uses to latch the
data.
After reset, the default state is SCI input.
RXD1
(SS0)
105
Input
(Schmitt)
Input
Receive Data (RXD1)— receive data input
SPI Slave Select—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
After reset, the default state is SCI input.
TXD2
(GPIOC6)
104
Output
Input/Output
Transmit Data (TXD2)—transmit data output
Port C GPIO—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is GPIO output.
RXD2
(GPIOC7)
103
Input/Output
Receive Data (RXD2)— receive data input
Port C GPIO—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is GPIO input.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
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