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| 型号： | DSPB56366AG120 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 15/110页 |
| 文件大小： | 0K |
| 描述： | IC DSP 24BIT AUD 120MHZ 144-LQFP |
| 产品变化通告： | Product Discontinuation 24/Feb/2012 |
| 标准包装： | 60 |
| 系列： | DSP56K/Symphony |
| 类型： | 音频处理器 |
| 接口： | 主机接口，I²C，SAI，SPI |
| 时钟速率： | 120MHz |
| 非易失内存： | ROM（240 kB） |
| 芯片上RAM： | 69kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 3.30V |
| 工作温度： | -40°C ~ 110°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
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DSP56366 Technical Data, Rev. 3.1
2-8
Freescale Semiconductor
2.6
Interrupt and Mode Control
The interrupt and mode control signals select the chip’s operating mode as it comes out of hardware reset.
After RESET is deasserted, these inputs are hardware interrupt request lines.
Table 2-8 Interrupt and Mode Control
Signal Name
Type
State
during
Reset
Signal Description
MODA/IRQA
Input
Mode Select A/External Interrupt Request A—MODA/IRQA is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODA/IRQA selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into the OMR when the RESET signal is deasserted. If the processor is
in the stop standby state and the MODA/IRQA pin is pulled to GND, the processor will
exit the stop state.
This input is 5 V tolerant.
MODB/IRQB
Input
Mode Select B/External Interrupt Request B—MODB/IRQB is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODB/IRQB selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into OMR when the RESET signal is deasserted.
This input is 5 V tolerant.
MODC/IRQC
Input
Mode Select C/External Interrupt Request C—MODC/IRQC is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into OMR when the RESET signal is deasserted.
This input is 5 V tolerant.
MODD/IRQD
Input
Mode Select D/External Interrupt Request D—MODD/IRQD is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into OMR when the RESET signal is deasserted.
This input is 5 V tolerant.
RESET
Input
Reset—RESET is an active-low, Schmitt-trigger input. When asserted, the chip is placed
in the Reset state and the internal phase generator is reset. The Schmitt-trigger input
allows a slowly rising input (such as a capacitor charging) to reset the chip reliably. When
the RESET signal is deasserted, the initial chip operating mode is latched from the
MODA, MODB, MODC, and MODD inputs. The RESET signal must be asserted during
power up. A stable EXTAL signal must be supplied while RESET is being asserted.
This input is 5 V tolerant.
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| DSPB56366PV120 | 制造商:Motorola Inc 功能描述: 制造商:Freescale Semiconductor 功能描述:IC 制造商:MOTOROLA 功能描述: |
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| DSPB56367PV150 | 功能描述:数字信号处理器和控制器 - DSP, DSC 150Mhz/ 150MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
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